EP7311 Data Sheet
FEATURES
■
ARM720T Processor
— ARM7TDMI CPU
— 8 KB of four-way set-associative cache
— MMU with 64-entry TLB
— Thumb code support enabled
■
Ultra low power
— 90 mW at 74 MHz typical
— 30 mW at 18 MHz typical
— 10 mW in the Idle State
— <1 mW in the Standby State
■
48 KB of on-chip SRAM
■
MaverickKey™ IDs
— 32-bit unique ID can be used for SDMI compliance
— 128-bit random ID
■
Dynamically programmable clock speeds of
18, 36, 49, and 74 MHz
High-performance,
Low-power, System-on-chip
with SDRAM & Enhanced
Digital Audio Interface
OVERVIEW
The Maverick™ EP7311 is designed for ultra-low-power
applications such as PDAs, smart cellular phones, and
industrial hand held information appliances. The core-logic
functionality of the device is built around an ARM720T
processor with 8 KB of four-way set-associative unified cache
and a write buffer. Incorporated into the ARM720T is an
enhanced memory management unit (MMU) which allows for
support of sophisticated operating systems like Linux
®
.
(cont.)
(cont.)
BLOCK DIAGRAM
Multimedia
Codec Port
Power
Management
EPB Bus
Clocks &
Timers
ARM720T
USER INTERFACE
ICE-JTAG
ARM7TDMI CPU Core
Interrupts,
PWM & GPIO
SERIAL PORTS
Serial
Interface
(2) UARTs
w/ IrDA
Internal Data Bus
8 KB
Cache
Boot
ROM
Write
Buffer
Bus
Bridge
MMU
Keypad&
Touch
Screen I/F
Memory Controller
TM
MaverickKey
SRAM I/F
SDRAM I/F
On-chip SRAM
48 KB
LCD
Controller
MEMORY AND STORAGE
©
Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
AUG ‘05
DS506F1
CIRRUS [ CIRRUS LOGIC ]
