2
2.0 Circuit Description
2.1 Bt8370/8375/8376 Block Diagrams
Detailed block diagrams are illustrated in Figure 2-1 (Bt8370), Figure 2-2
(Bt8375), and Figure 2-3 (Bt8376). To show the details of this circuit, individual
block diagrams, along with descriptions, appear throughout this section.
1. Receive Line Interface Unit (RLIU)
2. Jitter Attenuator (JAT)
3. Digital Receiver (RCVR)
4. Receive System Bus (RSB)
5. Clock Rate Adapter (CLAD)
6. Transmit System Bus (TSB)
7. Digital Transmitter (XMTR)
8. Transmit Line Interface Unit (TLIU)
9. Microprocessor Interface (MPU)
10. Joint Test Access Group Port (JTAG)
NOTE: The Bt8375 differs from the Bt8370 only in that the Bt8375 does not have
LBO filters in the transmit LIU. The Bt8376 differs from Bt8375 in that
Bt8376 has neither a CLADO output, nor a DLINK2.
N8370DSE
Conexant
2-1
CONEXANT [ CONEXANT SYSTEMS, INC ]
