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BT8376KPF 参数 Datasheet PDF下载

BT8376KPF图片预览
型号: BT8376KPF
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片收发器T1 / E1和综合业务数字网( ISDN )基本速率接口 [single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces]
分类和应用: 综合业务数字网
文件页数/大小: 323 页 / 1950 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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Bt8370/8375/8376  
3.8 Receiver Registers  
Fully Integrated T1/E1 Framer and Line Interface  
RLOFDRLOFA  
RX Reframe CriteriaDetermines the number of frame errors the online framer must detect  
before declaring a loss of frame alignment [ALM1; addr 047]. Refer to the Receive Framer  
mode in [RFRAME; addr 001] (Table 2-3, Criteria for Loss/Recovery of Receive Framer  
Alignment) to find which frame bits are monitored.  
T1/E1N  
RLOFDA  
0100  
Reframe Criteria  
3 Consecutive FAS or 915 CRC errors  
3 Consecutive FAS Errors  
2 out of 4 F-bit errors  
0
0
1
1
1
1100  
0001  
0010  
2 out of 5 F-bit errors  
0100  
2 out of 6 F-bit errors  
NOTE: Other RLOFDRLOFA combinations are invalid. RAIS and  
RLOF status is disabled if RLOFDRLOFA equal all zeros.  
RZCS  
Receive B8ZS/HDB3 Zero Code Substitution (affects only BPV/LCV/EXZ counting)When  
set, the ZCS decoder does not include bipolar violations received as part of a B8ZS/HDB3  
code in the LCV error count [addr 054, 055]. Otherwise, all bipolar violations are counted.  
EXZ detection criteria is either 8 or 16 consecutive zeros, depending on the RZCS  
configuration.  
0 = ZCS decoder reports all occurrences of BPV;  
also selects EXZ = 16 zeros  
1 = ZCS decoder does not report BPVs received as part of ZCS;  
also selects EXZ = 8 zeros  
041Receive Test Pattern Configuration (RPATT)  
7
6
5
4
3
2
1
0
RESEED  
BSTART  
FRAMED  
ZLIMIT  
RPATT[1]  
RPATT[0]  
RESEED  
Re-seed PRBS Sync Detector (auto clear)If BSTART is active high, writing a one to  
RESEED forces the PRBS sync detector to reseed and search for test pattern sync [PSYNC;  
addr 00B]. The reseed and search algorithm remains active until a test pattern sync is found.  
0 = no effect  
1 = reseed and search for test pattern sync  
When inverted data mode is selected, initiating RESEED [RPATT; addr 041] while  
receiving all 1s will cause false pattern sync. In such cases, check receive slip buffers to see if  
not all 1s is being received, then re-enable RESEED.  
BSTART  
Enable PRBS Detector and Start Counting PRBS Bit ErrorsBERR [addr 058, 059] counting  
is enabled when BSTART is active high and a pattern sync is found [PSYNC=1; addr 00B];  
otherwise, the BERR counter holds its present value until cleared by a processor read.  
0 = PRBS detector disabled and BERR stops counting  
1 = enable PRBS detector and BERR counter  
3-48  
Conexant  
N8370DSE