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CN8330 参数 Datasheet PDF下载

CN8330图片预览
型号: CN8330
PDF下载: 下载PDF文件 查看货源
内容描述: DS3 / E3成帧器与52 Mbps的HDLC控制器 [DS3/E3 Framer with 52 Mbps HDLC Controller]
分类和应用: 控制器
文件页数/大小: 101 页 / 571 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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3.0 Registers  
CN8330  
3.2 Status Registers  
DS3/E3 Framer with 52 Mbps HDLC Controller  
3.2 Status Registers  
There are six Status Registers: five for DS3/E3 status and one to indicate the version number of the IC. Also  
included is a shadow register for the DS3/E3 maintenance status to latch status indications until read. The  
contents of these registers are described here and summarized in the Register Summary at the end of this  
section. The status signals are contained in latches and are applied to the controller data bus on the appropriate  
read command from the controller. The active state of all bits in the Status Registers is high.  
0x10—DS3/E3 Maintenance Status Register (SR00)  
The DS3/E3 Maintenance Status Register contains the major DS3/E3 maintenance indicators. Alarm detection  
details can be found in Alarm Detection in the Receiver Operation section of the Functional Description  
chapter.  
7
6
5
4
3
2
1
0
ReFrm  
FrmtID1  
FrmtID0  
IdleDet  
YelDet  
AISDet  
OOFAlm  
LOSAlm  
ReFrm  
Reframe In ProgressSet while the framing circuit is searching for a valid framing pattern in  
either DS3 or E3 modes.  
FrmtID1,0  
Format IdentificationIdentifies the incoming format based on the contents of the application  
ID channel contained in the first C-bit of subframe 1. This bit pair will be set to 00 to indicate  
M13 format, 01 to indicate C-bit parity format, and 10 to indicate Syntran format. In E3 mode,  
these bits are meaningless and should be ignored.  
IdleDet  
Idle Code DetectSet if there is valid framing and parity, the three C-bits in subframe 3 are  
zero, both X-bits are equal, and the payload contains a 1100... pattern starting with an 11 after  
each overhead bit in DS3 mode. This bit will be low in E3 mode since there is no defined E3  
idle signal.  
YelDet  
AISDet  
Yellow Alarm DetectSet for one M-frame interval when both X-bits are low in the previous  
M-frame in DS3 mode. This bit is set when the received A-bit is high in E3 mode. This bit will  
not go active if LOSAlm, OOFAlm, or AISDet are active.  
Alarm Indication Signal DetectSet if there is valid framing and parity, all C-bits are 0, both  
X-bits are equal, and the payload contains a 1010... pattern starting with a one after each  
overhead bit in DS3 mode. This bit is set when an unframed all-ones signal is received in E3  
mode.  
OOFAlm  
LOSAlm  
Out of Frame AlarmSet when any 3 out of 16 consecutive F framing bits are in error or  
when 2 out of 3 consecutive M frames have errors in the M bit positions in DS3 mode. This bit  
is set when four consecutive FAS errors have been received in E3 mode. This condition will  
initiate a reframe.  
Loss-Of-Signal AlarmIndicates that the received signal prior to B3ZS/HDB3 decoding has  
been low for 175 ± 75 clock cycles. This indicates that the DS3/E3 line signal has been lost.  
This signal is set as soon as the loss-of-signal condition is detected and is cleared when at least  
33 percent (25 percent in E3 mode) one's density is achieved for 175 ± 75 clock cycles  
3-6  
Conexant  
100441E