Appendix B
CN8330
B.3 HDLC Formatter Mode Support While Configured for E3 Framing
DS3/E3 Framer with 52 Mbps HDLC Controller
B.3 HDLC Formatter Mode Support While
Configured for E3 Framing
This mode was previously selected by configuring the following bits: CR00.3=1
(E3Frm), CR04.3 (ParaEn) and CR05.1=0 (DisPPDL).If this mode is selected, the
zero insertion function of the HDLC formatter incorrectly inserts an extra zero
when the transmitted HDLC packet contains stuffed zeros that overlap the 16-bit
E3 overhead. This transmitter malfunction causes the HDLC receiver to interpret
the extra zero as data which results in an FCS errored packet. This problem
prevents any customer from developing an E3 framed HDLC mode application.
Notice that parallel data still functions properly in E3 mode if CR05.1=1
(DisPPDL).
Workaround: By using two CN8330 devices with one operating in HDLC
formatter mode and another device exclusively in E3 mode same results can be
achieved.
B-2
Conexant
100441E
CONEXANT [ CONEXANT SYSTEMS, INC ]
