Appendix A JTAG Interface
CN8478/CN8474A/CN8472A/CN8471A
A.2 BYPASS Register
Multichannel Synchronous Communications Controller (MUSYCC™)
A.2 BYPASS Register
The BYPASS register is a 1-bit shift register that passes TDI data to TDO, which
facilitates testing other devices in the scan path without having to shift the data
patterns through the compare Boundary Scan register of the CN8478.
Table A-2. JTAG Timing Table
Label
Description
Min
—
Max
100
0.6 tper
0.6 tper
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tper
tpwl
tpwh
trec
ts
Period, TCK
Pulse Width Low, TCK
Pulse Width High, TCK
0.4 tper
0.4 tper
100
15
Recovery, the rising edge of TCK from the rising edge of TRST~
Setup, TMS, TDI to the rising edge of TCK
—
th
Hold, TMS, TDI from the rising edge of TCK
Enable, TDO from the falling edge of TCK
15
—
ten
—
15
tpd
Propagation Delay, TDO from the falling edge of TCK
Disable, TDO from the falling edge of TCK
—
15
tdis1
tdis2
—
15
Disable, TDO from the falling edge of TRST~
—
100
A-2
Conexant
100660E
CONEXANT [ CONEXANT SYSTEMS, INC ]
