CN8478/CN8474A/CN8472A/CN8471A
7.0 Electrical and Mechanical Specifications
Multichannel Synchronous Communications Controller (MUSYCC™)
7.2 Timing and Switching Specifications
Table 7-6. PCI Clock (PCLK) Waveform Parameters, 66 MHz PCI Clock
Symbol
Tcyc
Parameter
Clock Cycle Time(1)
Min
Max
—
—
—
4
Unit
ns
15
Thigh
Tlow
—
Clock High Time
Clock Low Time
6
ns
6
1
ns
Clock Slew Rate(2)
V/ns
V
Vptp
Peak-to-Peak Voltage
0.4 Vdd
—
NOTE(S):
(1)
MUSYCC works with any clock frequency between DC and 66 MHz, nominally. The clock frequency can be changed at any
time during operation of the system as long as clock edges remain monotonic, and minimum cycle and high and low times
are not violated. The clock can only be stopped in a low state.
Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate must be met across the minimum
peak-to-peak portion of the clock waveform.
(2)
Figure 7-1. PCI Clock (PCLK) Waveform
0.6 V
dd
0.5V
V
dd
V
ptp
0.4V
dd
min
0.3V
dd
0.2 V
dd
T
T
low
high
T
cyc
8478_023
100660E
Conexant
7-5
CONEXANT [ CONEXANT SYSTEMS, INC ]
