CX28394/28395/28398
2.0 Circuit Description
Quad/x16/Octal—T1/E1/J1 Framers
2.5 Microprocessor Interface
2.5 Microprocessor Interface
The Microprocessor Interface (MPU) provides the capability to configure the
device, read status registers and counters, and respond to interrupts (see
Figure 2-27). The interface supports both the Intel 8051 and Motorola 68000-type
processors. In the Intel mode, the address and data are multiplexed; in the
Motorola mode, the address and data are separate pins. Both synchronous and
asynchronous Read and Write modes are supported. The synchronous mode is
optimized for Motorola 68000-type processors with a maximum clock rate of 36
MHz. The asynchronous mode runs internally at 32 MHz, which limits the
processor speed to 30 MHz for 68302 processors, and 16 MHz for 8051
processors.
The microprocessor interface is made up of the following pins: MCLK,
MOTO*, SYNCMD, CS*, AS*/ALE, DS*/RD*, R/W*/WR*, DTACK*,
AD[7:0], A[11:0], INTR*, ONESEC, RST*. A detailed description of the MPU
signals is provided in Table 1-6, Hardware Signal Definitions.
Figure 2-27. Microprocessor Interface Block Diagram
MCLK
MOTO*
SYNCMD
CS*
AS*/ALE
DS*/RD*
R/W*(WR*)
DTACK*
AD[7:0]
A[11:0]
INTR*
ONESEC
RST*
100054E
Conexant
2-55
CONEXANT [ CONEXANT SYSTEMS, INC ]
