CY2318ANZ
Pin Summary
Name
V
DD
V
SS
V
DDIIC
V
SSIIC
BUF_IN
OE
SDATA
SCLK
SDRAM [0–3]
SDRAM [4–7]
SDRAM [8–11]
Pins
3, 7, 12, 16, 20, 29, 33, 37, 42, 46
23
26
11
38
24
25
4, 5, 8, 9
13, 14, 17, 18
31, 32, 35, 36
Description
3.3V Digital voltage supply
Serial interface voltage supply
Ground for serial interface
Input clock (5V Tolerant)
Output Enable (active HIGH), Three-state outputs when low
[1]
Serial data input
[1]
Serial clock input
[1]
SDRAM byte 0 clock outputs
SDRAM byte 1 clock outputs
SDRAM byte 2 clock outputs
SDRAM byte 3 clock outputs
SDRAM clock outputs usable for feedback
Reserved for future modifications, do not connect in system
6, 10, 15, 19, 22, 27, 30, 34, 39, 43 Ground
SDRAM [12–15] 40, 41, 44, 45
SDRAM [16–17] 21, 28
N/C
1, 2, 47, 48
Note:
1. Internal pull-up resistor to V
DD
(value > 100 kohms)
Device Functionality
OE
0
1
SDRAM [0–17]
Hi-Z
1 x BUF_IN
Document #: 38-07181 Rev. *B
Page 2 of 9
CYPRESS [ CYPRESS SEMICONDUCTOR ]
