CY7C132/CY7C136
CY7C142/CY7C146
Switching Characteristics
Over the Operating Range (Speeds -35, -45, -55) (continued)
[5, 10]
7C132-35
7C136-35
7C142-35
7C146-35
Parameter
Write Cycle
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
t
BLA
t
BHA
t
BLC
t
BHC
t
PS
t
WB
t
WH
t
BDD
t
DDD
t
WDD
t
WINS
t
EINS
t
INS
t
OINR
t
EINR
t
INR
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
R/W Pulse Width
Data Set-up to Write End
Data Hold from Write End
R/W LOW to High Z
R/W HIGH to Low Z
BUSY LOW from Address Match
BUSY HIGH from Address Mismatch
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH
Port Set Up for Priority
R/W LOW after BUSY LOW
R/W HIGH after BUSY HIGH
BUSY HIGH to Valid Data
Write Data Valid to Read Data Valid
Write Pulse to Data Delay
7C132-45
7C136-45
7C142-45
7C146-45
Min.
45
35
35
2
0
30
20
0
Max.
7C132-55
7C136-55
7C142-55
7C146-55
Min.
55
40
40
2
0
30
20
0
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
25
0
ns
ns
30
30
30
30
5
0
35
ns
ns
ns
ns
ns
ns
ns
45
Note 17
Note 17
45
45
45
45
45
45
ns
ns
ns
ns
ns
ns
ns
ns
ns
Description
Min.
35
30
30
2
0
25
15
0
Max.
20
0
20
20
20
20
5
0
30
35
Note 17
Note 17
25
25
25
25
25
25
5
0
35
0
20
Busy/Interrupt Timing
25
25
25
25
45
Note 17
Note 17
35
35
35
35
35
35
Interrupt Timing
R/W to INTERRUPT Set Time
CE to INTERRUPT Set Time
Address to INTERRUPT Set Time
OE to INTERRUPT Reset Time
CE to INTERRUPT Reset Time
Address to INTERRUPT Reset Time
Document #: 38-06031 Rev. *C
Page 6 of 18
CYPRESS [ CYPRESS SEMICONDUCTOR ]
