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CY7C1352B-100AC 参数 Datasheet PDF下载

CY7C1352B-100AC图片预览
型号: CY7C1352B-100AC
PDF下载: 下载PDF文件 查看货源
内容描述: 256K ×18 Pipilined SRAM与NOBL架构 [256K x 18 Pipilined SRAm with NoBL Architecture]
分类和应用: 静态存储器
文件页数/大小: 12 页 / 190 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
 浏览型号CY7C1352B-100AC的Datasheet PDF文件第3页浏览型号CY7C1352B-100AC的Datasheet PDF文件第4页浏览型号CY7C1352B-100AC的Datasheet PDF文件第5页浏览型号CY7C1352B-100AC的Datasheet PDF文件第6页浏览型号CY7C1352B-100AC的Datasheet PDF文件第8页浏览型号CY7C1352B-100AC的Datasheet PDF文件第9页浏览型号CY7C1352B-100AC的Datasheet PDF文件第10页浏览型号CY7C1352B-100AC的Datasheet PDF文件第11页  
PRELIMINARY
Capacitance
[10]
Parameter
C
IN
C
CLK
C
I/O
Description
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
DD
= 3.3V.
V
DDQ
= 3.3V
Max.
4
4
4
CY7C1352B
Unit
pF
pF
pF
AC Test Loads and Waveforms
R=317Ω
[11]
OUTPUT
Z
0
=50Ω
R
L
=50Ω
V
L
= 1.5V
3.3V
OUTPUT
ALL INPUT PULSES
3.0V
5 pF
R=351Ω GND
(a)
INCLUDING
JIG AND
SCOPE
(b)
1352B-2
Thermal Resistance
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Still Air, soldered on a 4.25 x 1.125 inch, 4-
layer printed circuit board
Symbol
Θ
JA
Θ
JC
TQFP Typ.
28
4
Units
°C/W
°C/W
Notes
10
10
Note:
10. Tested initially and after any design or process change that may affect these parameters.
11. AC test conditions assume signal transition time of 2 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading shown in (a)
of AC Test Loads and Waveforms.
7