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CY7C63743-SC 参数 Datasheet PDF下载

CY7C63743-SC图片预览
型号: CY7C63743-SC
PDF下载: 下载PDF文件 查看货源
内容描述: 的enCoRe USB的组合低速USB和PS / 2外围控制器 [enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller]
分类和应用: 控制器
文件页数/大小: 58 页 / 1162 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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FOR
FOR
enCoRe™
USB CY7C63722/23
CY7C63743
The return from subroutine (RET) instruction restores the program counter, but not the flags, from program stack and decrements
the PSP by two.
Note that there are restrictions in using the JMP, CALL, and INDEX instructions across the 4-KB boundary of the program memory.
Refer to the
CYASM Assembler User’s Guide
for a detailed description.
6.5
8-bit Data Stack Pointer (DSP)
The data stack pointer (DSP) supports PUSH and POP instructions that use the data stack for temporary storage. A PUSH
instruction will pre-decrement the DSP, then write data to the memory location addressed by the DSP. A POP instruction will read
data from the memory location addressed by the DSP, then post-increment the DSP.
During a reset, the Data Stack Pointer will be set to zero. A PUSH instruction when DSP equals zero will write data at the top of
the data RAM (address 0xFF). This would write data to the memory area reserved for a FIFO for USB endpoint 0. In non-USB
applications, this works fine and is not a problem.
For USB applications, the firmware should set the DSP to an appropriate location to avoid a memory conflict with RAM dedicated
to USB FIFOs. The memory requirements for the USB endpoints are shown in Section 8.2. For example, assembly instructions
to set the DSP to 20h (giving 32 bytes for program and data stack combined) are shown below:
MOV A,20h
; Move 20 hex into Accumulator (must be D8h or less to avoid USB FIFOs)
SWAP A,DSP ; swap accumulator value into DSP register
6.6
Address Modes
The CY7C637xx microcontrollers support three addressing modes for instructions that require data operands: data, direct, and
indexed.
6.6.1
Data
The “Data” address mode refers to a data operand that is actually a constant encoded in the instruction. As an example, consider
the instruction that loads A with the constant 0x30:
• MOV A, 30h
This instruction will require two bytes of code where the first byte identifies the “MOV A” instruction with a data operand as the
second byte. The second byte of the instruction will be the constant “0xE8h”. A constant may be referred to by name if a prior
“EQU” statement assigns the constant value to the name. For example, the following code is equivalent to the example shown
above:
• DSPINIT: EQU 30h
• MOV A,DSPINIT
6.6.2
Direct
“Direct” address mode is used when the data operand is a variable stored in SRAM. In that case, the one byte address of the
variable is encoded in the instruction. As an example, consider an instruction that loads A with the contents of memory address
location 0x10h:
• MOV A, [10h]
In normal usage, variable names are assigned to variable addresses using “EQU” statements to improve the readability of the
assembler source code. As an example, the following code is equivalent to the example shown above:
• buttons: EQU 10h
• MOV A,[buttons]
6.6.3
Indexed
“Indexed” address mode allows the firmware to manipulate arrays of data stored in SRAM. The address of the data operand is
the sum of a constant encoded in the instruction and the contents of the “X” register. In normal usage, the constant will be the
“base” address of an array of data and the X register will contain an index that indicates which element of the array is actually
addressed:
• array: EQU 10h
• MOV X,3
• MOV A,[x+array]
This would have the effect of loading A with the fourth element of the SRAM “array” that begins at address 0x10h. The fourth
element would be at address 0x13h.
Document #: 38-08022 Rev. **
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