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CY8C24223A-24PVXI 参数 Datasheet PDF下载

CY8C24223A-24PVXI图片预览
型号: CY8C24223A-24PVXI
PDF下载: 下载PDF文件 查看货源
内容描述: 的PSoC可编程系统级芯片 [PSoC Programmable System-on-Chip]
分类和应用:
文件页数/大小: 55 页 / 1570 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY8C24123A
CY8C24223A, CY8C24423A
PSoC
®
Programmable System-on-Chip™
Features
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
2.4 to 5.25V Operating Voltage
Operating Voltages Down to 1.0V Using On-Chip Switch
Mode Pump (SMP)
Industrial Temperature Range: -40°C to +85°C
Advanced Peripherals (PSoC
®
Blocks)
Six Rail-to-Rail Analog PSoC Blocks Provide:
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators
Four Digital PSoC Blocks Provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART
• Multiple SPI Masters or Slaves
• Connectable to All GPIO Pins
Complex Peripherals by Combining Blocks
Precision, Programmable Clocking
Internal ±2.5% 24/48 MHz Oscillator
High accuracy 24 MHz with optional 32 kHz Crystal and PLL
Optional External Oscillator, up to 24 MHz
Internal Oscillator for Watchdog and Sleep
Flexible On-Chip Memory
4K Flash Program Storage 50,000 Erase/Write Cycles
256 Bytes SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Programmable Pin Configurations
25 mA Sink on all GPIO
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO
Up to Ten Analog Inputs on GPIO
Two 30 mA Analog Outputs on GPIO
Configurable Interrupt on All GPIO
New CY8C24x23A PSoC Device
Derived From the CY8C24x23 Device
Low Power and Low Voltage (2.4V)
Additional System Resources
2
I C™ Slave, Master, and MultiMaster to 400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference
Complete Development Tools
Free Development Software (PSoC Designer™)
Full-Featured, In-Circuit Emulator, and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Trace Memory
Logic Block Diagram
Port 2 Port 1 Port 0
Analog
Drivers
PSoC CORE
System Bus
Global Digital Interconnect
SRAM
256 Bytes
Interrupt
Controller
SROM
Global Analog Interconnect
Flash 4K
Sleep and
Watchdog
CPU Core (M8C)
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
DIGITAL SYSTEM
Digital
Block
Array
ANALOG SYSTEM
Analog
Block
Array
Analog
Ref
Analog
Input
Muxing
Digital
Clocks
Multiply
Accum.
Decimator
I
2
C
POR and LVD
System Resets
Internal
Voltage
Ref.
Switch
Mode
Pump
SYSTEM RESOURCES
Cypress Semiconductor Corporation
Document Number: 38-12028 Rev. *J
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised April 14, 2009