merging Memory & Logic Solutions Inc.
FEATURES
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Process Technology : 0.18µm Full CMOS
Organization : 256K x 16 bit
Power Supply Voltage : 2.7V ~ 3.3V
Low Data Retention Voltage : 1.5V(Min.)
Three state output and TTL Compatible
Package Type : 48-FPBGA 6.0x7.0
EM641FU16E Series
Low Power, 256Kx16 SRAM
GENERAL DESCRIPTION
The EM641FU16E families are fabricated by EMLSI’s
advanced full CMOS process technology. The families
support industrial temperature range and Chip Scale
Package for user flexibility of system design. The fami-
lies also supports low data retention voltage for battery
back-up operation with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product
Family
EM641FU16E
Operating
Temperature
Industrial (-40 ~ 85
o
C)
Vcc Range
Speed
Standby
(I
SB1
, Typ.)
1
µA
Operating
(I
CC1
.Max.)
2 mA
PKG Type
2.7V~3.3V
55
1)
/70ns
48 FPBGA
1. The parameter is measured with 30pF test load.
PIN DESCRIPTION
1
A
B
C
D
E
F
G
H
2
3
4
5
6
FUNCTIONAL BLOCK DIAGRAM
Pre-charge Circuit
LB
I/O
9
OE
UB
A
0
A
3
A
5
A
17
DNU
A
14
A
12
A
9
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
A
2
CS
I/O
2
I/O
4
I/O
5
I/O
6
WE
A
11
DNU
I/O
1
I/O
3
V
CC
V
SS
I/O
7
I/O
8
DNU
A A
12
A A A
15
A A
11
13
14
16
17
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
V
C
C
Row S elect
V
SS
Memory Array
2048 x 2048
I/O
1 0
I/O
11
V
SS
V
C C
I/O
12
I/O
13
I/O1 ~ I/O8
I/O9 ~ I/O16
Data
Cont
Data
Cont
I/O Circuit
Column Select
I/O
1 5
I/O
14
I/O
1 6
DNU
DNU
A
8
48-FPBGA : Top view (ball down)
W
E
O
E
UB
Control Logic
Name
CS
OE
WE
A
0
~A
17
Function
Chip select input
Output Enable input
Write Enable input
Address Inputs
Name
Vcc
Vss
UB
LB
DNU
Function
Power Supply
Ground
Upper Byte (I/O
9~16
)
Lower Byte (I/O
1~8
)
Do Not Use
LB
CS
I/O
1
~I/O
16
Data Inputs/outputs
2