EM620FV8BT Series
Low Power, 256Kx8 SRAM
DATA RETENTION CHARACTERISTICS
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data Retention Time
Operation Recovery Time
NOTES
Symbol
V
DR
I
DR
t
SDR
t
RDR
Test Condition
I
SB1
Test Condition
(Chip Disabled)
1)
V
CC
=1.5V, I
SB1
Test Condition
(Chip Disabled)
1)
See data retention wave form
Min
1.5
-
0
t
RC
Typ
2)
-
0.5
-
-
Max
3.6
5.0
-
-
Unit
V
µA
ns
1. See the I
SB1
measurement condition of data sheet page 4.
2. Typical value is measured at T
A
=25
o
C and not 100% tested.
DATA RETENTION WAVE FORM
t
SDR
V
cc
3.0V
Data Retention Mode
t
RDR
2.2V
V
DR
CS1
GND
V
cc
3.0V
CS2
V
DR
0.4V
CS2 < 0.2V
CS1 > Vcc-0.2V
Data Retention Mode
t
SDR
t
RDR
GND
9