PBL 3766
RINGX
Sense
26
TIPX
Sense
28
RINGX
3
VBAT
BGND
27
TIPX
4
VCC
GND
VCC
RINGRLY
1
2
3
4
5
6
7
8
9
22
RINGX
21
TIPX
20
DT
19
RD
18
VBAT
17
VBAT
16
HPR
15
HPT
14
VTX
13
VEE
12
RSN
2
RINGRLY
VBAT
RSG
NC
E0
5
6
7
8
9
1
25
NC
24
VBAT
23
DT
22
RD
21
HPR
20
HPT
19
VTX
RSG
VBAT
VBAT
E0
DET
C2
VBAT
10
DET
11
C1
10
VBAT
17
VEE
18
C2
12
C1
13
RDC
14
NC
15
RSN
16
RDC
11
Figure 7. Pin configuration, 28-pin plastic leaded chip carrier and 22-pin plastic dual-in-line package, top view.
Pin Description
PLCC: 28-pin, plastic, j-leaded chip carrier. DIP: 22-pin, dual-in-line (batwing), plastic package. Refer to figure 7.
PLCC
DIP
Symbol
Description
1
2
3
4
5
-
1
-
2
3
RINGX
Sense
RINGX
Sense
is internally connected to RINGX. RINGX
Sense
is used during manufacturing, but
requires no connection in SLIC applications, i.e. leave open.
GND
VBAT
VCC
Ground.
Refer to PLCC, terminal 6 description.
+5 V power supply.
RINGRLY Ring relay driver output. Open emitter with grounded collector (npn). Sources 50 mA from ground
to a relay coil connected to a negative voltage. Must be protected by external inductive kick-back
diode. Positive voltage relay driver can be provided as a metal mask option. Contact factory for
availability.
Battery supply voltage. Negative with respect to GND. -21 V to -58 V. All VBAT terminals
should be connected to printed circuit board traces to provide heatsinking.
Saturation guard programming resistor, R
SG
, connects from this terminal to VEE. Leave open for
nominal battery voltages from -24 V to -28 V. Connect to VEE for a nominal battery voltage of -48
V. For other battery voltages and for detailed information refer to section Battery Feed.
No internal connection. Note 1.
TTL compatible enable input. Enables the
DET
output, when set to logic level low and disables the
DET
output, when set to logic level high. Refer to section Enable Input for detailed information.
Refer to PLCC, terminal 6 description.
6, 3,
5, 6, VBAT
10, 17, 17, 18
24
7
4
RSG
8
9
10
-
7
-
NC
E0
VBAT
4-8
ERICSSON [ ERICSSON ]
