PBL 386 61/2
Pin Description
Refer to figure 7.
PLCC Symbol
1
2
3
VBAT
VBAT2
AOV
Description
Preliminary
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
PSG
LP
DT
DR
VEE
REF
NU
PLC
PLD
VCC
NU
C2
C1
NC
DET
RSN
Battery supply voltage. Negative with respect to BGND.
An optional second battery voltage, connected in series with a diode, or an external powerhandling resistor
connects to this pin.
Adaptive Overhead Voltage.
If the pin is left open then the overhead voltage is set internally to 3.1 V
Peak
in
off-hook and 1.4 V
Peak
in on-hook. The overhead voltage will adapt to signals > 3.1 V
Peak
. If the pin is
connected to AGND then no internal overhead voltage is set. The overhead voltage adapts to 0.6 V
Peak
<
signals < 6.2 V
Peak
.
Programmable Saturation Guard.
The resistive part of the DC feed characteristic is programmed by a
resistor connected from this pin to VBAT.
Low Pass
saturation guard filter capacitor connected here to filter out noise and improve PSRR. Other end
of C
LP
connects to VBAT.
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic level
low, indicating off-hook condition. The ring trip network connects to this input.
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic level
low, indicating off-hook condition. The ring trip network connects to this input.
-5V to VBAT power supply.
A 15 kΩ resistor should be connected between this pin and AGND.
Not Used.
Must be left open.
Prog. Line Current,
the constant current part of the DC feed characteristic is programmed by a resistor
connected from this pin to AGND.
Programmable Loop Detector
threshold. The loop detection threshold is programmed by a resistor
connected from this pin to AGND.
+5 V power supply.
Not Used.
Pin must be connected to AGND.
C1 and C2 are digital inputs
Controlling
the SLIC operating states. Refer to
section operating states for details.
No Connect.
Must be left open.
Detector
output. Active low when indicating loop or ring trip detection, active high when indicating ground
key detection
Receive Summing Node.
400 times the current flowing into this pin equals the metallic (transversal) current
flowing from RINGX to TIPX. Programming networks for two-wire impedance and receive gain connect to
the receive summing node.
Analog Ground,
should be tied together with BGND.
Transmit vf output. The ac voltage difference between TIPX and RINGX, the ac metallic voltage, is
reproduced as an unbalanced GND referenced signal at VTX with a gain of -0.5. The two-wire impedance
programming network connects between VTX and RSN.
Ring Relay
driver output.
Tip Sense
should be connected to TIPX.
No Connect.
Must be left open.
High Pass
connection for ac/dc separation capacitor C
HP
. Other end of C
HP
connects to RINGX (pin 26).
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
Battery Ground,
should be tied together with AGND.
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
}
20
21
AGND
VTX
22
23
24
25
26
27
28
RRLY
TS
NC
HP
RINGX
BGND
TIPX
8
ERICSSON [ ERICSSON ]
