Preliminary
PBL 386 65/2
2
VBAT2
TS
2
HP
3
RINGX
4
BGND
5
TIPX
6
VBAT
7
VBAT2
8
AOV
9
PSG
10
27
26
25
24
23
AGND
RSN
DET
C1
C2
C3
VCC
PLD
PLC
LP
5
DT
6
DR
7
VEE
8
REF
9
SPR
10
PLC
11
27
BGND
1
VBAT
28
TIPX
4
PSG
3
AOV
RRLY
1
28
26
RINGX
VTX
25
24
23
HP
NC*
TS
RRLY
VTX
AGND
RSN
28-pin SSOP
22
21
20
19
18
17
28 pin PLCC
22
21
20
19
PLD
12
VCC
13
C3
14
C2
15
C1
16
NC*
17
DT
12
REF
VEE
NC*
DR
13
*NC
14
16
15
*
Pins must be left open.
Figure 8. Pin configuration 28 pin SSOP and 28 pin package, top view.
SLIC Operating States
State
0
1
2
3
4
5
6
7
C3
0
0
0
0
1
1
1
1
C2
0
0
1
1
0
0
1
1
C1
0
1
0
1
0
1
0
1
SLIC operating state
Open circuit
Ringing state
Active state
Active state
Tip open state
Active state
Active reverse
Active reverse
Active detector
Detector is set high
Ring trip detector (active low)
Loop detector (active low)
Line voltage measurement
Loop detector (active low)
Ground key detector (active high)
Loop detector (active low)
Ground key detector (active high)
Table 1. SLIC operating states.
DET
18
LP
11
SPR
9
ERICSSON [ ERICSSON ]
