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16C2850 参数 Datasheet PDF下载

16C2850图片预览
型号: 16C2850
PDF下载: 下载PDF文件 查看货源
内容描述: 双UART,具有128字节FIFO的和RS- 485半双工控制 [DUAL UART WITH 128-byte FIFO’s AND RS-485 HALF DUPLEX CONTROL]
分类和应用: 先进先出芯片
文件页数/大小: 44 页 / 670 K
品牌: EXAR [ EXAR CORPORATION ]
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XR16C2850
ing the removal of a data byte, the user should recheck
LSR bit-0 for additional characters. A Receive Time
Out will not occur if the receive FIFO is empty. The
time out counter is reset at the center of each stop bit
received or each time the receive holding register
(RHR) is read. The actual time out value is T (Time out
length in bits) = 4 X P (Programmed word length) + 12.
To convert the time out value to a character value, the
user has to consider the complete word length, includ-
ing data information length, start bit, parity bit, and the
size of stop bit, i.e., 1X, 1.5X, or 2X bit times.
Example -A: If the user programs a word length of 7,
with no parity and one stop bit, the time out will be:
T = 4 X 7( programmed word length) +12 = 40 bit times.
The character time will be equal to 40 / 9 = 4.4
characters, or as shown in the fully worked out ex-
ample: T = [(programmed word length = 7) + (stop bit
= 1) + (start bit = 1) = 9]. 40 (bit times divided by 9) =
4.4 characters.
Example -B: If the user programs the word length = 7,
with parity and one stop bit, the time out will be:
T = 4 X 7(programmed word length) + 12 = 40 bit times.
Character time = 40 / 10 [ (programmed word length
= 7) + (parity = 1) + (stop bit = 1) + (start bit = 1)] = 4
characters.
Programmable Baud Rate Generator
The 2850 supports high speed modem technologies
that have increased input data rates by employing
data compression schemes. For example a 33.6Kbps
modem that employs data compression may require a
115.2Kbps input data rate. A 128.0Kbps ISDN modem
that supports data compression may need an input
data rate of 460.8Kbps. The 2850 can support a
standard data rate of 921.6Kbps.
A single baud rate generator is provided for the
transmitter and receiver, allowing independent TX/RX
channel control. The programmable Baud Rate
Generator is capable of accepting an input clock up to
24 MHz, as required for supporting a 1.5Mbps data
rate. The 2850 can be configured for internal or
external clock operation. For internal clock oscillator
operation, an industry standard microprocessor crys-
tal (parallel resonant 22-33 pF load) is connected
Rev. 1.00P
12
externally between the XTAL1 and XTAL2 pins, with
an external 1 MΩ resistor across it. Alternatively, an
external clock can be connected to the XTAL1 pin to
clock the internal baud rate generator for standard or
custom rates.
The generator divides the input 16X clock by any
divisor from 1 to 2
16
-1. The 2850 divides the basic
crystal or external clock by 16. Further division of this
16X clock provides two table rates to support low and
high data rate applications using the same system
design. The two rate tables are selectable through the
internal register, MCR bit-7. Setting MCR bit-7 to a
logic 1 provides an additional divide by 4 whereas,
setting MCR bit-7 to a logic 0 only divides by 1 (see
Table 4 and Figure 11). The frequency of the -
BAUDOUT output pin is exactly 16X (16 times) of the
selected baud rate (-BAUDOUT =16 x Baud Rate).
Customized Baud Rates can be achieved by selecting
the proper divisor values for the MSB and LSB sec-
tions of baud rate generator.
Crystal oscillator connection
XTAL1
XTAL2
R1
50-120
R2
1M
X1
1.8432 MHz
C2
33pF
C1
22pF