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MP3274AG 参数 Datasheet PDF下载

MP3274AG图片预览
型号: MP3274AG
PDF下载: 下载PDF文件 查看货源
内容描述: 故障保护32通道, 12位数据采集子系统 [Fault Protected 32 Channel, 12-Bit Data Acquisition Subsystem]
分类和应用:
文件页数/大小: 16 页 / 173 K
品牌: EXAR [ EXAR CORPORATION ]
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MP3274
Fault Protected 32 Channel, 12-Bit
Data Acquisition Subsystem
FEATURES
Complete 32-Channel 12-Bit A/D Converter
with Sample & Hold, Reference, Clock and
3-State Outputs
Fast Conversion, less than 15µS
Microprocessor Bus Interface
Parallel or Serial Data Output Modes
65 ns Bus Access Time
Remote Analog Ground Sensing
Overvoltage Protected Input (50 V over the
Supply Voltages)
Precision Reference for Long Term Stability and
Low Gain T.C.
Guaranteed Linearity Over Temperature
Guaranteed Performance at +12/–5 V,
±12
&
±15
V
Low Power (3 mW per Channel Typical)
16 Channel Version: MP3276 & MP3275
GENERAL DESCRIPTION
The MP3274 is a complete 32-channel, 12-bit Data Acquisi-
tion Subsystem with 3-state output buffers for direct interfacing
to 16-bit microprocessor buses. Implemented using an ad-
vanced BiCMOS process, the converter combines a 32-channel
passive overvoltage protected multiplexer instrumentation amp,
a sample & hold, a SAR, a 12-bit decoded D/A, a comparator, a
precision reference and the control logic to achieve an accurate,
repeated conversion in less than 15µs, and a mux/instrumenta-
tion amp settling period of less than 10µs.
A unique input design provides input overvoltage protection
to
50
V over the supply voltages. Therefore, an overvoltage
condition can exist on unselected channels without disrupting
the measured channel or operation of the MP3274! The internal
4 V reference has sufficient output current to provide other sys-
tem reference needs. Precision thin film scaling and offset resis-
tors are laser trimmed to provide for less than 2 LSB INL for +10
V inputs on all channels.
In addition, the MP3274 will output either full scale (0111 ....)
for overrange and – full scale (1000....) for underrange condi-
tions. This greatly simplifies microprocessor software develop-
ment.
SIMPLIFIED BLOCK DIAGRAM
GND REF.
V
DD
V
CC
AGND
AB0-4
(5 pins)
AIN0-31
(32 pins)
5
32 Ch.
MUX
+
Comp
REF IN /2
32
AGND
2
V
REF
REF IN
REF OUT
4V
REF
VDAC
CLK
12
SAR
AGND
3
Control
Logic
12
Latch/
Shift Register
3-State
Drivers
PXS
DGND V
EE
AGND
WR RD
CS
ADEN
STL
STS
DB0-DB11
Rev. 4.00
1