MP3274
CS
WR
t
5
t
3
ADDRESS
t
4
t
1
t
2
ADEN
t
6
STL
t
7
STS
t
8
t
12
t
10
t
11
DB0-DB11
RD = 0
DB0-DB11
RD = 1
HIGH Z
Previous ADC Data
t
13
New ADC Data
t
9
t
14
Figure 1. Timing for ADC Channel Select Start Conversion
ADC Read Timing
CS to RD Set-Up Time
CS to RD Hold Time
RD to Data Valid Delay
Bus Relinquish Time after RD
High
RD Pulse Width
Time
Interval
t
15
t
16
t
17
t
18
t
19
25
°
C
0
0
100
150
100
100
Tmin to
Tmax
0
0
150
200
150
150
Limits
ns min
ns min
ns max
ns max
ns max
ns min
Comments/Test Conditions
Load ckt of
Figure 3.,
C
L
= 20 pF
Load ckt of
Figure 3.,
C
L
= 100 pF
Load ckt of
Figure 4.
Table 3. ADC Read Timing
(See
Figure 2.)
CS
RD
t
15
t
19
t
16
DATA
t
17
Valid
t
18
Figure 2. Timing for ADC Read
Rev. 4.00
8