74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs
March 1995
Revised February 2005
74LCX08
Low Voltage Quad 2-Input AND Gate
with 5V Tolerant Inputs
General Description
The LCX08 contains four 2-input AND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LVX08 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V–3.6V V
CC
specifications provided
s
5.5 ns t
PD
max (V
CC
3.3V), 10
P
A I
CC
max
3.0V)
s
Power down high impedance inputs and outputs
s
r
24 mA output drive (V
CC
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds JEDEC 78 conditions
s
ESD performance:
Human body model
!
2000V
Machine model
!
150V
s
Leadless Pb-Free DQFN package
Ordering Code:
Order Number
74LCX08M
74LCX08MX_NL
(Note 1)
74LCX08SJ
74LCX08BQX
(Note 2)
74LCX08MTC
74LCX08MTCX_NL
(Note 1)
Package
Number
M14A
M14A
M14D
MLP014A
MTC14
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
“_NL” indicates Pb-Free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.
Note 2:
DQFN package available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation
DS012411
www.fairchildsemi.com