CD4030C Quad EXCLUSIVE-OR Gate
October 1987
Revised January 1999
CD4030C
Quad EXCLUSIVE-OR Gate
General Description
The CD4030C EXCLUSIVE-OR gates are monolithic com-
plementary MOS (CMOS) integrated circuits constructed
with N- and P-channel enhancement mode transistors. All
inputs are protected against static discharge with diodes to
V
DD
and V
SS
.
t
PHL
=
t
PLH
=
40 ns (typ.) at C
L
=
15 pF, 10V supply
s
High noise immunity
0.45 V
CC
(typ.)
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Industrial controls
• Remote metering
• Computers
Features
s
Wide supply voltage range:
s
Low power:
100 nW (typ.)
s
Medium speed operation:
3.0V to 15V
Ordering Code:
Order Number
CD4030CSJ
CD4030CN
Package Number
M14D
N14A
Package Description
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOP
Truth Table
A
0
1
0
1
1
=
HIGH Level
0
=
LOW Level
B
0
0
1
1
J
0
1
1
0
© 1999 Fairchild Semiconductor Corporation
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www.fairchildsemi.com
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