FDG313N
July 2000
FDG313N
Digital FET, N-Channel
General Description
This N-Channel enhancement mode field effect
transistor is produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance. This device has been designed especially
for low voltage applications as a replacement for
bipolar digital transistor and small signal MOSFET.
Features
•
0.95 A, 25 V. R
DS(on)
= 0.45
Ω
@ V
GS
= 4.5 V
R
DS(on)
= 0.60
Ω
@ V
GS
= 2.7 V.
•
•
•
•
Low gate charge (1.64 nC typical)
Very low level gate drive requirements allowing direct
operation in 3V circuits (V
GS(th)
< 1.5V).
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
Compact industry standard SC70-6 surface mount
package.
Applications
•
Load switch
•
Battery protection
•
Power management
D
D
S
1
6
2
5
pin
1
SC70-6
D
D
G
3
4
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
- Continuous
- Pulsed
T
A
= 25°C unless otherwise noted
Parameter
FDG313N
25
(Note 1a)
Units
V
V
A
W
±
8
0.95
2
0.75
0.55
0.48
-55 to +150
6
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
, T
stg
ESD
Operating and Storage Junction Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
°
C
kV
Thermal Characteristics
R
θ
JA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
260
°
C/W
Package Outlines and Ordering Information
Device Marking
.
13
1998
Fairchild Semiconductor Corporation
Device
FDG313N
Reel Size
7’’
Tape Width
8mm
Quantity
3000 units
FDG313N Rev. C
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
