FDMC8200 Dual N-Channel PowerTrench
®
MOSFET
June 2009
FDMC8200
Dual N-Channel PowerTrench
®
MOSFET
30 V, 9.5 mΩ
and
20 mΩ
Features
Q1: N-Channel
Max r
DS(on)
= 20 mΩ at V
GS
= 10 V, I
D
= 6 A
Max r
DS(on)
= 32 mΩ at V
GS
= 4.5 V, I
D
= 5 A
Q2: N-Channel
Max r
DS(on)
= 9.5 mΩ at V
GS
= 10 V, I
D
= 9 A
Max r
DS(on)
= 13.5 mΩ at V
GS
= 4.5 V, I
D
= 7 A
RoHS Compliant
General Description
This device includes two specialized N-Channel MOSFETs in a
dual Power33 (3mm x 3mm MLP) package. The switch node
has been internally connected to enable easy placement and
routing of synchronous buck converters.
designed to provide optimal power efficiency.
The control
MOSFET (Q1) and synchronous MOSFET (Q2) have been
Applications
Mobile Computing
Mobile Internet Devices
General Purpose Point of Load
Pin 1
G1
D1
D1
D1
G
HS
V
IN
V
IN
V
IN
S2
S2
S2
G2
5
6
7
8
Q2
4
D1
3
D1
2
D1
Q1
D1
D2/S1
S2
E
OD
HN
ITC
SW
V
IN
G2
BOTTOM
S2
S2
G
LS
D
GN
ND
DG
GN
1
G1
BOTTOM
Power 33
MOSFET Maximum Ratings
T
C
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
Drain to Source Voltage
Gate to Source Voltage
Drain Current - Continuous (Package limited)
I
D
- Continuous (Silicon limited)
- Continuous
- Pulsed
P
D
T
J
, T
STG
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
T
A
= 25 °C
T
A
= 25 °C
(Note 3)
T
C
= 25 °C
T
C
= 25 °C
T
A
= 25 °C
Parameter
Q1
30
±20
18
23
8
1a
Q2
30
±20
18
45
12
1b
40
2.2
1b
0.9
1d
Units
V
V
A
40
1.9
1a
0.7
1c
W
°C
-55 to +150
Thermal Characteristics
R
θJA
R
θJA
R
θJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
65
1a
180
1c
7.5
55
1b
145
1d
4
°C/W
Package Marking and Ordering Information
Device Marking
FDMC8200
Device
FDMC8200
Package
Power 33
1
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
©2009 Fairchild Semiconductor Corporation
FDMC8200 Rev.A1
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
