FQL40N50
May 2001
QFET
FQL40N50
500V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply, power
factor correction, motor drive and welding machine.
TM
Features
•
•
•
•
•
•
40A, 500V, R
DS(on)
= 0.11Ω @V
GS
= 10 V
Low gate charge ( typical 155 nC)
Low Crss ( typical 95 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
"
G
!
! "
"
"
TO-264
G D S
FQL Series
T
C
= 25°C unless otherwise noted
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25°C)
Drain Current
- Continuous (T
C
= 100°C)
Drain Current
- Pulsed
(Note 1)
FQL40N50
500
40
25
160
±
30
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
C
= 25°C)
1780
40
46
4.5
460
3.7
-55 to +150
300
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R
θJC
R
θCS
R
θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
Typ
--
0.1
--
Max
0.27
--
30
Units
°C/W
°C/W
°C/W
©2001 Fairchild Semiconductor Corporation
Rev. A1. May 2001