HCPL0700, HCPL0701, HCPL0730, HCPL0731 — Low Input Current High Gain Split Darlington Optocouplers
Test Circuits
1
I
F
Noise
Shield
Pulse
Generator
tr = 5ns
Z
O
= 50
V
I/
f
< 100µs
8
7
6
5
V
CC
C
+5 V
Pulse
Generator
tr = 5ns
Z
O
= 50
V
I
F
+
Noise
Shield
1
V
F1
-
8
7
6
V
CC
L
+5 V
0.1
µF
V
O
C = 15 pF*
2
V
F
V
B
R
L
10% DUTY CYCLE
I/f < 100
µS
V
O
2
-
V
01
3
I
F
Monitor
R
m
V
O
0.1
µF
V
02
I
F
MONITOR
Rm
C
L
= 15 pF*
V
F2
+
4
GND
4
5
GND
Test Circuit for HCPL-0700 and HCPL-0701
I
F
Test Circuit for HCPL-0730 and HCPL-0731
V
O
5V
1.5 V
1.5 V
V
OL
O
T
PHL
T
PLH
Fig. 14 Switching Time Test Circuit
T
I
F
Noise
Shield
Noise
Shield
1
2
V
F
A
B
V
FF
8
7
6
5
V
CC
C
+5 V
I
F
+
V
F1
-
A
1
2
3
4
8
7
6
5
V
CC
R
L
V
01
0.1
µF
+5 V
V
B
R
L
B
V
O
0.1
µF
V
FF
F
V
O
3
4
+
V
CM
C
V
O
-
V
F2
+
V
02
GND
-
GND
-
Pulse Gen
+
V
CM
-
Pulse Gen
Test Circuit for HCPL-0700 and HCPL-0701
V
CM
10 V
C
10%
t
r
Test Circuit for HCPL-0730 and HCPL-0731
90%
90%
10%
t
f
0V
V
O
Switch at A : I
F
= 0 mA
V
O
Switch at B : I
F
= 1.6 mA
5V
V
OL
Fig. 15 Common Mode Immunity Test Circuit
T
©2003 Fairchild Semiconductor Corporation
HCPL0700, HCPL0701, HCPL0730, HCPL0731 Rev. 1.0.1
www.fairchildsemi.com
8
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
