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ML4800 参数 Datasheet PDF下载

ML4800图片预览
型号: ML4800
PDF下载: 下载PDF文件 查看货源
内容描述: 功率因数校正和PWM控制器组合 [Power Factor Correction and PWM Controller Combo]
分类和应用: 功率因数校正控制器
文件页数/大小: 14 页 / 156 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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March 2001
PRELIMINARY
ML4800
Power Factor Correction and PWM Controller Combo
GENERAL DESCRIPTION
The ML4800 is a controller for power factor corrected,
switched mode power supplies. Power Factor Correction
(PFC) allows the use of smaller, lower cost bulk capacitors,
reduces power line loading and stress on the switching
FETs, and results in a power supply that fully complies
with IEC1000-3-2 specification. Intended as a BiCMOS
version of the industry-standard ML4824, the ML4800
includes circuits for the implementation of leading edge,
average current, “boost” type power factor correction and
a trailing edge, pulse width modulator (PWM). It also
includes a TriFault Detect™ function to help ensure that no
unsafe conditions will result from single component failure
in the PFC. Gate-drivers with 1A capabilities minimize the
need for external driver circuits. Low power requirements
improve efficiency and reduce component costs.
An over-voltage comparator shuts down the PFC section in
the event of a sudden decrease in load. The PFC section
also includes peak current limiting and input voltage
brownout protection. The PWM section can be operated in
current or voltage mode, at up to 250kHz, and includes an
accurate 50% duty cycle limit to prevent transformer
saturation.
FEATURES
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Internally synchronized leading-edge PFC and trailing-
edge PWM in one IC
TriFault Detect™ for UL1950 compliance and
enhanced safety
Slew rate enhanced transconductance error amplifier
for ultra-fast PFC response
Low power: 200µA startup current, 5.5mA operating
current
Low total harmonic distortion, high PF
Reduced ripple current in storage capacitor between
PFC and PWM sections
Average current, continuous boost leading edge PFC
PWM configurable for current-mode or voltage mode
operation
Current fed gain modulator for improved noise immunity
Overvoltage and brown-out protection, UVLO, and soft
start
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BLOCK DIAGRAM
16
VEAO
VFB
15
2.5V
IAC
2
VRMS
4
ISENSE
3
RAMP 1
7
RAMP 2
8
OSCILLATOR
DUTY CYCLE
LIMIT
-
+
-
-
+
1
IEAO
POWER FACTOR CORRECTOR
0.5V
1.6kΩ
+
-
+
-
+
-
13
TRI-FAULT
2.75V
OVP
+
-
VCC
17V
VCC
7.5V
REFERENCE
S
Q
Q
PFC OUT
Q
Q
12
VREF
14
VEA
IEA
GAIN
MODULATOR
1.6kΩ
-1V
+
-
R
S
R
PFC ILIMIT
VDC
6
VCC
SS
5
25µA
1.25V
S
VFB
2.45V
-
+
Q
Q
PWM OUT
11
VIN OK
1.0V
-
+
+
R
DC ILIMIT
DC ILIMIT
9
VREF
PULSE WIDTH MODULATOR
VCC
UVLO
REV. 1.0.2 3/7/2001