July 1996
NDS8858H
Complementary MOSFET Half Bridge
General Description
These Complementary MOSFET half bridge devices are
produced using Fairchild's proprietary, high cell density,
DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage half bridge
applications or CMOS applications when both gates are
connected together.
Features
N-Channel 6.3A, 30V, R
DS(ON)
=0.035
Ω
@ V
GS
=10V.
P-Channel -4.8A, -30V, R
DS(ON)
=0.065
Ω
@ V
GS
=-10V.
High density cell design or extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Matched pair for equal input capacitance and power capability
.
________________________________________________________________________________
V+
P-Gate
Vout
Vout
Vout
N -Gate
Vout
V-
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Maximum Power Dissipation
(Single Device)
T
J
,T
STG
T
A
= 25°C unless otherwise noted
N-Channel
30
20
(Note 1a &2)
P-Channel
-30
-20
-4.8
20
2.5
1.2
1
-55 to 150
Units
V
V
A
6.3
20
(Note 1a)
(Note 1b)
(Note 1c)
W
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
(Single Device)
(Note 1a)
Thermal Resistance, Junction-to-Case
(Single Device)
(Note 1a)
50
25
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS8858H Rev. C
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
