July 1996
NDS8926
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as DC motor control
and DC/DC conversion where fast switching, low in-line power
loss, and resistance to transients are needed.
Features
5.5 A, 20 V. R
DS(ON)
= 0.035
Ω
@ V
GS
= 4.5 V
R
DS(ON)
= 0.045
Ω
@ V
GS
= 2.7 V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
___________________________________________________________________________________________
5
4
3
2
1
6
7
8
Absolute Maximum Ratings
T
A
= 25°C unless otherwise note
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note1b)
(Note1c)
(Note 1a)
NDS8926
20
8
5.5
20
2
1.6
1
0.9
-55 to 150
Units
V
V
A
W
T
J
,T
STG
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
78
40
°C/W
°C/W
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS8926 Rev. D2
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
