欢迎访问ic37.com |
会员登录 免费注册
发布采购

UC3846N 参数 Datasheet PDF下载

UC3846N图片预览
型号: UC3846N
PDF下载: 下载PDF文件 查看货源
内容描述: SMPS控制器 [SMPS Controller]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器
文件页数/大小: 10 页 / 69 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
 浏览型号UC3846N的Datasheet PDF文件第2页浏览型号UC3846N的Datasheet PDF文件第3页浏览型号UC3846N的Datasheet PDF文件第4页浏览型号UC3846N的Datasheet PDF文件第5页浏览型号UC3846N的Datasheet PDF文件第6页浏览型号UC3846N的Datasheet PDF文件第7页浏览型号UC3846N的Datasheet PDF文件第8页浏览型号UC3846N的Datasheet PDF文件第9页  
www.fairchildsemi.com
UC3846
SMPS Controller
Features
• Automatic Feed Forward Compensation
• Programmable Pulse by Pulse Current Limiting
• Automatic Symmetry Correction in Push-Pull
Configuration
• Enhanced Load Response Characteristics
• Parallel Operation Capability for Modulator Power
Systems
• Differential Current Sense Amplifier with Common Mode
Range
• Double Pulse Suppression
• 200mA Totem-Pole Outputs
±2%
Band gap Reference
• Under-Voltage Lockout
• Soft-Start Capability
• Shutdown Terminal
• 500KHz Operation
Description
The UC3846 control IC provides all of the necessary fea-
tures to implement fixed frequency, current mode control
schemes while maintaining a minimum external parts count.
The superior performance of this technique can be measured
in improved line regulation, enhanced load response char-
acteristics, and a simpler, easier-to-design control loop.
Topological advantages include inherent pulse-by-pulse cur-
rent limiting capability, automatic symmetry correction for
push-pull converters, and the ability to parallel “power
module
,,
while maintaining equal current sharing. Protection
circuitry includes built-in-under-voltage lockout and pro-
grammable current limit in addition to soft-start capability. A
shutdown function is also available which can initiate either
a complete shutdown with automatic restart or latch the
supply off. Other features include fully latched operation,
double pulse suppression, deadtime adjust capability, and
±2% trimmed bandgap reference. The UC3846 features low
outputs in the OFF state.
16-DIP
1
Internal Block Diagram
10
Rev. 5.0
©2000 Fairchild Semiconductor International