CMS3216LAx-75xx
Features
- Functionality
- LVCMOS Compatible IO Interface
- 54ball FBGA with 0.8mm ball pitch
- CMS3216LAF : Normal
- CMS3216LAG : Pb-Free
- CMS3216LAH : Pb-Free & Halogen Free
- Standard SDRAM Functionality
- Programmable burst lengths : 1, 2, 4, 8, or full page
- JEDEC Compatibility
- Low Power Features
- Low voltage power supply : 2.5V/3.0V
- Auto TCSR(Temperature Compensated Self Refresh)
- Partial Array Self Refresh power-saving mode
- Deep Power Down Mode
- Driver Strength Control
- Operating Temperature Ranges:
- Special (-10℃ to +60℃)
- Commercial (0℃ to +70℃)
- Extended (-25℃ to +85℃)
- Industrial (-40℃ to +85℃)
Functional Description
The CMS3216LAx-xxxx family is high-performance CMOS
Dynamic RAMs (DRAM) organized as 2M x 16. These devices
feature advanced circuit design to provide ultra-low active current
and extremely low standby current.This is ideal for providing
More Battery Life in portable applications such as wireless
handsets. The device is compatible with the JEDEC standard
LP-SDRAM specifications.
Logic Block Diagram
CKE
CLK
Bank 1
/CS
/WE
/CAS
/RAS
Control
Logic
Refresh
Counter
Bank 0
DQM0-
DQM1
Bank 0
Memory
Array
Bank 0
Row
Row
Add
Mux
Row
Addr
Mode
Reg
Data
Output
Reg
Addr
Latch/
Latch/
Decoder
Decoder
2Kx8K
Enhanced
Mode
Reg
Sense Amp
Bank
Write Drivers
Control
Logic
DQM Mask
READ DATA
LATCH
DQ0 -
DQ15
A0-A10
BS
Addr
Reg
Data
Input
Reg
Column
Decoder
Decoder
Column
Column
Address
Latch
Selection Guide
Voltage
Access Time(tAC)
Device
Frequency
tRCD
tRP
VDD
VDDQ
CL=2
CL=3
6ns
133MHz
100MHz
18ns
20ns
18ns
20ns
CMS3216LAx-75xx
2.3-3.3V
1.65-VDD
7.5ns
Rev0.2, Jan. 2007
FIDELIX [ FIDELIX ]
