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CMS4A16LAF 参数 Datasheet PDF下载

CMS4A16LAF图片预览
型号: CMS4A16LAF
PDF下载: 下载PDF文件 查看货源
内容描述: 128M ( 8Mx16 )低功耗SDRAM [128M(8Mx16) Low Power SDRAM]
分类和应用: 动态存储器
文件页数/大小: 46 页 / 616 K
品牌: FIDELIX [ FIDELIX ]
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CMS4A16LAx–75Ex
128M(8Mx16) Low Power SDRAM
Features
- Functionality
- Standard SDRAM Functionality
- Programmable burst lengths : 1, 2, 4, 8, or full page
- JEDEC Compatibility
- Low Power Features
- Low voltage power supply : 1.8V
- Auto TCSR(Temperature Compensated Self Refresh)
- Partial Array Self Refresh power-saving mode
- Deep Power Down Mode
- Driver Strength Control
- Operating Temperature Ranges:
- Special (-10℃ to +60℃)
- Commercial (0℃ to +70℃)
- Extended (-25℃ to +85℃)
- Industrial (-40℃ to +85℃)
-
LVCMOS Compatible IO Interface
-
54ball FBGA with 0.8mm ball pitch
- CMS4A16LAF : Normal
- CMS4A16LAG : Pb-Free
- CMS4A16LAH : Pb-Free & Halogen Free
Functional Description
The CMS4A16LAF Family is high-performance CMOS Dynamic
RAMs (DRAM) organized as 8M x 16. These devices feature
advanced circuit design to provide low active current and
extremely low standby current.
The device is compatible with the JEDEC standard
LP-SDRAM specifications.
Logic Block Diagram
CKE
CLK
/CS
/WE
/CAS
/RAS
Control
Logic
Refresh
Counter
Row
Address
Mux
Mode
Register
Extended
Mode
Register
Bank 0
Bank 0
Row
Row
Address
Addr
Latch/
Latch/
Decoder
Decoder
Bank 3
Bank 2
Bank 1
Bank 0
Memory
Array
8Kx4K
Data
Output
Register
LDQM -
UDQM
Sense Amp
Bank
Control
Logic
A0-A11
BA0-BA1
Address
Register
Column
Address
Latch
Column
Column
Decoder
Column
Decoder
Column
Decoder
Decoder
Write Drivers
DQM Mask
DQ0 -
DQ15
Data
Input
Register
Selection Guide
Voltage
Device
V
DD
CMS4A16LAx-75Ex
1.7-1.95V
V
DDQ
133MHz
1.7-V
DD
100MHz
8ns
20ns
20ns
Frequency
CL=2
CL=3
7ns
20ns
20ns
Access Time(t
AC
)
t
RCD
t
RP
Rev. 0.5, May. ‘07
3