Freescale Semiconductor
Data Sheet:
Advanced Information
An Energy-Efficient Solution from Freescale
Document Number: MC9S08MM128
Rev. 2, 04/2010
Covers: MC9S08MM128, and MC9S08MM64, MC9S08MM32,
and MC9S08MM32A
8-Bit HCS08 Central Processor Unit (CPU)
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Up to 48-MHz CPU above 2.4 V, 40 MHz CPU above 2.1 V, and
20 MHz CPU above 1.8 V across temperature of -40°C to 105°C
HCS08 instruction set with added BGND instruction
Support for up to 32 interrupt/reset sources
128 K Dual Array Flash read/program/erase over full operating
voltage and temperature
12 KB Random-access memory (RAM)
Security circuitry to prevent unauthorized access to RAM and
Flash
Two ultra-low power stop modes. Peripheral clock enable register
can disable clocks to unused modules to reduce currents
Time of Day (TOD) — Ultra-low power 1/4 sec counter with up to
64s timeout.
Ultra-low power external oscillator that can be used in stop modes
to provide accurate clock source to the TOD. 6 usec typical wake
up time from stop3 mode
Oscillator (XOSC1) — Loop-control Pierce oscillator; 32.768 kHz
crystal or ceramic resonator dedicated for TOD operation.
Oscillator (XOSC2) — for high frequency crystal input for MCG
reference to be used for system clock and USB operations.
Multipurpose Clock Generator (MCG) — PLL and FLL; precision
trimming of internal reference allows 0.2% resolution and 2%
deviation over temperature and voltage; supports CPU
frequencies from 4 kHz to 48 MHz.
Watchdog computer operating properly (COP) reset Watchdog
computer operating properly (COP) reset with option to run from
dedicated 1-kHz internal clock source or bus clock
Low-voltage detection with reset or interrupt; selectable trip points;
separate low-voltage warning with optional interrupt; selectable
trip points
Illegal opcode and illegal address detection with reset
Flash block protection for each array to prevent accidental
write/erasure
Hardware CRC to support fast cyclic redundancy checks
Single-wire background debug interface
Real-time debug with 6 hardware breakpoints (4 PC, 1 address
and 1 data) Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
On-chip in-circuit emulator (ICE) debug module containing 3
comparators and 9 trigger modes
CMT—
Carrier Modulator timer for remote control
communications. Carrier generator, modulator and driver for
dedicated infrared out. Can be used as an output compare timer.
IIC—
Up to 100 kbps with maximum bus loading; Multi-master
operation; Programmable slave address; Interrupt driven
64-LQFP 10mm x 10mm
80-LQFP 12mm x 12mm
81-MapBGA 10mm x10mm
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On-Chip Memory
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Power-Saving Modes
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Clock Source Options
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System Protection
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Development Support
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byte-by-byte data transfer; supports broadcast mode and 11-bit
addressing
PRACMP
— Analog comparator with selectable interrupt;
compare option to programmable internal reference voltage;
operation in stop3
SCI
— Two serial communications interfaces with optional 13-bit
break; option to connect Rx input to PRACMP output on SCI1 and
SCI2; High current drive on Tx on SCI1 and SCI2; wake-up from
stop3 on Rx edge
SPI1—
Serial peripheral interface (SPI) with 64-bit FIFO buffer;
16-bit or 8-bit data transfers; full-duplex or single-wire
bidirectional; double-buffered transmit and receive; master or
slave mode; MSB-first or LSB-first shifting
SPI2—
Serial peripheral interface with full-duplex or single-wire
bidirectional; Double-buffered transmit and receive; Master or
Slave mode; MSB-first or LSB-first shifting
TPM
— Two 4-channel Timer/PWM Module; Selectable input
capture, output compare, or buffered edge- or center-aligned
PWM on each channel; external clock input/pulse accumulator
USB
— Supports USB in full-speed device configuration. On-chip
transceiver and 3.3V regulator help save system cost, fully
compliant with USB Specification 2.0. Allows control, bulk,
interrupt and isochronous transfers. Not available on
MC9S08MM32A devices.
ADC16
— 16-bit Successive approximation ADC with up to 4
dedicated differential channels and 8 single-ended channels;
range compare function; 1.7 mV/°C temperature sensor; internal
bandgap reference channel; operation in stop3; fully functional
from 3.6V to 1.8V, Configurable hardware trigger for 8 Channel
select and result registers
PDB
— Programmable delay block with 16-bit counter and
modulus and prescale to set reference clock to bus divided by 1 to
bus divided by 2048; 8 trigger outputs for ADC16 module provides
periodic coordination of ADC sampling sequence with sequence
completion interrupt; Back-to-Back mode and Timed mode
DAC
— 12-bit resolution; 16-word data buffers with configurable
watermark.
OPAMP
— Two flexible operational amplifiers configurable for
general operations; Low offset and temperature drift.
TRIAMP
— Two trans-impedance amplifiers dedicated for
converting current inputs into voltages.
Up to 47 GPIOs and 2 output-only pin and 1 input-only pin.
Voltage Reference output (VREFO).
Dedicated infrared output pin (IRO) with
high current sink capability.
Up to 16 KBI pins with selectable polarity.
81-MBGA (10x10x1.6) mm
80-LQFP (12x12x1.6) mm
64-LQFP (10x10x1.6) mm
Input/Output
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Peripherals
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Package Options
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This document contains information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2009-2010. All rights reserved.
Non-Disclosure Agreement Required
Preliminary — Subject to Change
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are
not available from Freescale for import or sale in the United States prior to September 2010: MC9S08MM128 products in 81 MAPBGA packages
MC9S08MM128 series
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
