Pinout
64
64
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
MAP
BGA
LQFP
UART0_COL_
b
E6
D7
D6
39
40
41
PTB16
TSI0_CH9
TSI0_CH10
TSI0_CH11
TSI0_CH9
TSI0_CH10
TSI0_CH11
PTB16
UART0_RX
UART0_TX
EWM_IN
PTB17
PTB18
PTB17
PTB18
EWM_OUT_b
I2S0_TX_
BCLK
C7
D8
42
43
PTB19
PTC0
TSI0_CH12
TSI0_CH12
PTB19
PTC0
I2S0_TX_FS
ADC0_SE14/
TSI0_CH13
ADC0_SE14/
TSI0_CH13
SPI0_PCS4
SPI0_PCS3
SPI0_PCS2
PDB0_EXTRG
C6
B7
44
45
PTC1/
LLWU_P6
ADC0_SE15/
TSI0_CH14
ADC0_SE15/
TSI0_CH14
PTC1/
LLWU_P6
UART1_RTS_
b
FTM0_CH0
FTM0_CH1
I2S0_TXD0
PTC2
ADC0_SE4b/
CMP1_IN0/
TSI0_CH15
ADC0_SE4b/
CMP1_IN0/
TSI0_CH15
PTC2
UART1_CTS_
b
I2S0_TX_FS
C8
46
PTC3/
LLWU_P7
CMP1_IN1
CMP1_IN1
PTC3/
LLWU_P7
SPI0_PCS1
UART1_RX
UART1_TX
FTM0_CH2
I2S0_TX_
BCLK
E3
E4
B8
47
48
49
VSS
VDD
VSS
VSS
VDD
VDD
PTC4/
LLWU_P8
DISABLED
PTC4/
LLWU_P8
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
SPI0_SIN
FTM0_CH3
I2S0_RXD0
CMP1_OUT
CMP0_OUT
I2S0_MCLK
A8
A7
50
51
PTC5/
LLWU_P9
DISABLED
CMP0_IN0
PTC5/
LLWU_P9
LPTMR0_
ALT2
PTC6/
LLWU_P10
CMP0_IN0
PTC6/
LLWU_P10
PDB0_EXTRG I2S0_RX_
BCLK
B6
A6
B5
52
53
54
PTC7
PTC8
PTC9
CMP0_IN1
CMP0_IN2
CMP0_IN3
CMP0_IN1
CMP0_IN2
CMP0_IN3
PTC7
PTC8
PTC9
I2S0_RX_FS
I2S0_MCLK
I2S0_RX_
BCLK
B4
A5
55
56
PTC10
DISABLED
DISABLED
PTC10
I2S0_RX_FS
PTC11/
PTC11/
LLWU_P11
LLWU_P11
C3
A4
C2
57
58
59
PTD0/
LLWU_P12
DISABLED
ADC0_SE5b
DISABLED
PTD0/
LLWU_P12
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
UART2_RTS_
b
PTD1
ADC0_SE5b
PTD1
UART2_CTS_
b
PTD2/
PTD2/
UART2_RX
LLWU_P13
LLWU_P13
B3
A3
60
61
PTD3
DISABLED
DISABLED
PTD3
SPI0_SIN
UART2_TX
PTD4/
LLWU_P14
PTD4/
LLWU_P14
SPI0_PCS1
UART0_RTS_
b
FTM0_CH4
FTM0_CH5
EWM_IN
C1
62
PTD5
ADC0_SE6b
ADC0_SE6b
ADC0_SE7b
PTD5
SPI0_PCS2
SPI0_PCS3
UART0_CTS_
b/
UART0_COL_
b
EWM_OUT_b
B2
63
PTD6/
ADC0_SE7b
PTD6/
UART0_RX
FTM0_CH6
FTM0_FLT0
LLWU_P15
LLWU_P15
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
56
Freescale Semiconductor, Inc.
FREESCALE [ Freescale ]
