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MPC8541EVTAKE 参数 Datasheet PDF下载

MPC8541EVTAKE图片预览
型号: MPC8541EVTAKE
PDF下载: 下载PDF文件 查看货源
内容描述: PowerQUICC⑩ III集成通信处理器的硬件规格 [PowerQUICC⑩ III Integrated Communications Processor Hardware Specifications]
分类和应用: 外围集成电路通信时钟
文件页数/大小: 84 页 / 1239 K
品牌: FREESCALE [ Freescale ]
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Ethernet: Three-Speed, MII Management  
8.2.4  
TBI AC Timing Specifications  
This section describes the TBI transmit and receive AC timing specifications.  
8.2.4.1  
TBI Transmit AC Timing Specifications  
Table 24 provides the MII transmit AC timing specifications.  
Table 24. TBI Transmit AC Timing Specifications  
At recommended operating conditions with LVDD of 3.3 V 5%.  
Parameter/Condition  
Symbol 1  
Min  
Typ  
Max  
Unit  
GTX_CLK clock period  
GTX_CLK duty cycle  
tTTX  
40  
8.0  
60  
ns  
%
tTTXH/tTTX  
tTTKHDV  
GMII data TCG[9:0], TX_ER, TX_EN setup time  
GTX_CLK going high  
2.0  
ns  
GMII data TCG[9:0], TX_ER, TX_EN hold time from  
GTX_CLK going high  
tTTKHDX  
1.0  
ns  
ns  
2,3  
GTX_CLK clock rise and fall time  
tTTXR, tTTXF  
1.0  
Notes:  
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state  
)(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTTKHDV  
symbolizes the TBI transmit timing (TT) with respect to the time from tTTX (K) going high (H) until the referenced data  
signals (D) reach the valid state (V) or setup time. Also, tTTKHDX symbolizes the TBI transmit timing (TT) with respect to the  
time from tTTX (K) going high (H) until the referenced data signals (D) reach the invalid state (X) or hold time. Note that, in  
general, the clock reference symbol representation is based on three letters representing the clock of a particular  
functional. For example, the subscript of tTTX represents the TBI (T) transmit (TX) clock. For rise and fall times, the latter  
convention is used with the appropriate letter: R (rise) or F (fall).  
2. Signal timings are measured at 0.7 V and 1.9 V voltage levels.  
3. Guaranteed by design.  
Figure 11 shows the TBI transmit AC timing diagram.  
tTTXR  
tTTX  
GTX_CLK  
TCG[9:0]  
tTTXH  
tTTXF  
tTTXF  
tTTKHDV  
tTTXR  
tTTKHDX  
Figure 11. TBI Transmit AC Timing Diagram  
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4  
Freescale Semiconductor  
26