GS1559 Data Sheet
PCLK
LUMA DATA OUT
3FF
000
000
XYZ
(SAV)
XYZ
(SAV)
CHROMA DATA OUT
FIFO_LD
3FF
000
000
FIFO LOAD PULSE - HD 20BIT OUTPUT MODE
PCLK
MULTIPLEXED
Y/Cr/Cb DATA OUT
FIFO_LD
FIFO LOAD PULSE - HD 10BIT OUTPUT MODE
XYZ
(SAV)
XYZ
(SAV)
3FF
3FF
000
000
000
000
PCLK
CHROMA DATA OUT
3FF
000
LUMA DATA OUT
FIFO_LD
000
XYZ
(SAV)
FIFO LOAD PULSE - SD 20BIT OUTPUT MODE
PCLK
MULTIPLEXED
Y/Cr/Cb DATA OUT
FIFO_LD
FIFO LOAD PULSE - SD 10BIT OUTPUT MODE
3FF
000
000
XYZ
(SAV)
Figure 4-5: FIFO_LD Pulse Timing
4.10.2 Ancillary Data Detection and Indication
The GS1559 will detect all types of ancillary data in either the vertical or horizontal
blanking spaces and indicate via the status signal output pins YANC and CANC the
position of ancillary data in the output data stream. These status signal outputs are
synchronous with PCLK and can be used as clock enables to external logic, or as
write enables to an external FIFO or other memory device.
When operating in HD mode, (SD/HD = LOW), the YANC signal will be HIGH
whenever ancillary data is detected in the luma data stream, and the CANC signal
will be HIGH whenever ancillary data is detected in the chroma data stream.
30572 - 4
July 2005
43 of 74
GENNUM [ GENNUM CORPORATION ]
