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EV2995-10 参数 Datasheet PDF下载

EV2995-10图片预览
型号: EV2995-10
PDF下载: 下载PDF文件 查看货源
内容描述: G2995评估板手册 [G2995 Evaluation Board Manual]
分类和应用:
文件页数/大小: 4 页 / 143 K
品牌: GMT [ GLOBAL MIXED-MODE TECHNOLOGY INC ]
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Global Mixed-mode Technology
EV2995-10
G2995 Evaluation Board Manual
Introduction
The G2995 evaluation board is designed to provide the design engineer with a fully functional prototype system
in which to evaluate the G2995 in both a static environment and with a complete memory system. It is one version
of the board, which SOP-8L(FD) is used. The application note contains information regarding the board,for more in-
formation regarding the G2995 please refer to the datasheet.
Schematic
The following schematic was used to create the layout.
Bill of Material
Name
U1
Qty
1
Value
Description
G2995 DDR Linear Regulator
Manufacturer
Global Mixed-mode Tech-
nology
http://www.gmt.com.tw
SANYO
SANYO
Model Number
G2995
C3, C5
C6
C1, C2
2
1
2
330uf
68uf
0.1uf
6.3V POSCAP Series
6.3V POSCAP Series
6TPD330M
6TPB68M
1068X7R1H104K
0603 Ceramic Capacitor X7R 6.3V TDK
Application
The G2995 evaluation board can be used immediately in either a static test environment to check functionality
or in a memory termination scheme on a motherboard. In either implementation the following steps should be
taken to ensure correct operation.
1. Correct leads from the evaluation board. The board layout has been designed to allows sockets to be directly sol-
dered.
2. AVIN and PVIN should be connected to a 2.5V power supply.
3. The VDDQ input provides the internal divide by two reference voltage. Both VREF and VTT will track this
internal voltage, nominally a 2.5V will be applied.
4. The VREF pad is the output for the VREF from the G2995 after being bypassed by a ceramic capacitor.
This can be connected either to a multi-meter for confirmation or directly to the memory controller and DIMMS.
5. The remaining two pads are for the force and sense leads of the VTT output. These should be connected
directly to the termination plane or a multi-meter if interested in verification. The output will be regulated where the
VSENSE leads connect to the VTT leads permitting the connection to a motherboard without suffering from large
resistance drops.
Mar 12, 2003
TEL: 886-3-5788833
http://www.gmt.com.tw
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