HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Pin Name
Function
PA6
PA6/OSC1
OSC1
PA7
PA7/RES
RES
VDD
VSS
Note:
VDD
VSS
CO
¾
¾
ST
PWR
PWR
OPT
PAPU
PAWK
CO
PAWK
I/T
ST
OSC
ST
O/T
Description
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
¾
¾
¾
Reset input
Power supply
Ground
I/T: Input type
O/T: Output type
OPT: Optional by configuration option (CO) or register option
PWR: Power
CO: Configuration option
ST: Schmitt Trigger input
CMOS: CMOS output
The important point to note here is that the PB0 and PB1 pads will not be bounded to pins in the 10-pin MSOP
package. These two pads default to an input state, the designer should set the register PBPU to pull high op-
tions. In this way, these two internal pads can be pulled up in order to prevent input pin floating power con-
sumption.
HT48R01B/HT48R02B
Pin Name
PA0
Function
PA0
PA1
PA1/PFD
PFD
PA2
PA2/TC0
TC0
PA3
PA3/INT
INT
PA4
PA4/TC1
TC1
PA5
PA5/OSC2
OSC2
PA6
PA6/OSC1
OSC1
PA7
PA7/RES
RES
VDD
VSS
VDD
VSS
CO
¾
¾
ST
PWR
PWR
OPT
PAPU
PAWK
PAPU
PAWK
CTRL0
PAPU
PAWK
¾
PAPU
PAWK
¾
PAPU
PAWK
¾
PAPU
PAWK
CO
PAPU
PAWK
CO
PAWK
I/T
ST
ST
¾
ST
ST
ST
ST
ST
ST
ST
¾
ST
OSC
ST
O/T
Description
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS PFD output
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External Timer 0 clock input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External interrupt input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External Timer 1 clock input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC
Oscillator pin
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
¾
¾
¾
Reset input
Power supply
Ground
Rev.1.10
4
February 12, 2010