ICM7363/7343/7323
QUAD 12/10/8-BIT VOLTAGE-OUTPUT DACS
IC MICROSYSTEMS
ground. This is why the linearity is specified for a starting
code greater than zero.
APPLICATIONS INFORMATION
Power Supply Bypassing and Layout Considerations
As in any precision circuit, careful consideration has to be
given to layout of the supply and ground. The return path
from the GND to the supply ground should be short with
low impedance. Using a ground plane would be ideal. The
supply should have some bypassing on it. A 10 µF
tantalum capacitor in parallel with a 0.1 µF ceramic with a
low ESR can be used. Ideally these would be placed as
close as possible to the device. Avoid crossing digital and
analog signals, specially the reference, or running them
close to each other.
Figure 6 illustrates how a gain error or positive offset error
will affect the output when it is close to VDD. A positive gain
error or positive offset will cause the output to be limited to
the positive supply voltage resulting in a deadband of
codes close to full-scale. This can be avoided by using a
reference voltage slightly less then 0.5 x VDD ensuring that
the full-scale of the DAC is always less than VDD
.
Output Swing Limitations
The ideal rail-to-rail DAC would swing from GND to VDD
however, offset and gain error limit this ability. Figure 5
illustrates how a negative offset error will affect the output.
The output will limit close to ground since this is single
supply part, resulting in a deadband area. As a larger input
is loaded into the DAC the output will eventually rise above
DEADBAND
NEGATIVE
OFFSET
Figure 5: Effect of Negative Offset
OFFSET AND
GAIN ERROR
VDD
DEADBAND
POSITIVE
OFFSET
Figure 6: Effect of Gain Error and Positive Offset
Rev. A8
ICmic reserves the right to change the specifications without prior notice.
8
ICMIC [ IC MICROSYSTEMS ]
