X24165
Flow 1. ACK Polling Sequence
Page Write
The X24165 is capable of a 32 byte page write operation.
It is initiated in the same manner as the byte write
WRITE OPERATION
COMPLETED
ENTER ACK POLLING
operation, but instead of terminating the write cycle after
the first data word is transferred, the master can
transmit up to fifteen more words. After the receipt of
each word, the X24165 will respond with an acknowledge.
ISSUE
START
After the receipt of each word, the five low order ad- dress
bits are internally incremented by one. The high order bits
of the word address remain constant. If the master should
transmit more than 32 words prior to generating the
stop condition, the address counter will “roll over” and
the previously written data will be over- written. As with
the byte write operation, all inputs are disabled until
completion of the internal write cycle. Refer to Figure 6
for the address, acknowledge and data transfer sequence.
ISSUE SLAVE
ADDRESS AND R/W = 0
ISSUE STOP
ACK
RETURNED?
NO
YES
Acknowledge Polling
The Max Write Cycle Time can be significantly reduced
using Acknowledge Polling. To initiate Acknowledge
NEXT
OPERATION
A WRITE?
NO
Polling, the master issues a start condition followed by
the Slave Address Byte for a write or read operation. If
YES
the device is still busy with the high voltage cycle, then
no ACK will be returned. If the device has completed
ISSUE BYTE
ADDRESS
the write operation, an ACK will be returned and the
host can then proceed with the read or write operation.
Refer to Flow 1.
ISSUE STOP
PROCEED
PROCEED
6551 ILL F09
Figure 6. Page Write
S
T
S
T
O
P
SLAVE
ADDRESS
A
R
T
BUS ACTIVITY:
MASTER
WORD ADDRESS (n)
DATA n
DATA n+1
DATA n+31
SDA LINE
S
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY:
X24165
6551 ILL F10.1
6
ICMIC [ IC MICROSYSTEMS ]
