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X24320S8G-1.8 参数 Datasheet PDF下载

X24320S8G-1.8图片预览
型号: X24320S8G-1.8
PDF下载: 下载PDF文件 查看货源
内容描述: 400kHz的2线串行E2PROM与锁座 [400KHz 2-Wire Serial E2PROM with Block Lock]
分类和应用: 可编程只读存储器
文件页数/大小: 17 页 / 302 K
品牌: ICMIC [ IC MICROSYSTEMS ]
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X24320  
The device will respond with an acknowledge after  
recognition of a start condition and its slave address. If  
Stop Condition  
All communications must be terminated by a stop  
condition, which is a LOW to HIGH transition of SDA  
both the device and a write operation have been selected,  
the device will respond with an acknowledge  
when SCL is HIGH. The stop condition is also used to place  
the device into the standby power mode after a  
after the receipt of each subsequent 8-bit word.  
read sequence. A stop condition can only be issued after  
the transmitting device has released the bus.  
In the read mode the device will transmit eight bits of data,  
release the SDA line and monitor the line for an  
acknowledge. If an acknowledge is detected and no stop  
condition is generated by the master, the device  
Acknowledge  
Acknowledge is a software convention used to indicate  
successful data transfer. The transmitting device,  
will continue to transmit data. If an acknowledge is not  
detected, the device will terminate further data trans-  
either master or slave, will release the bus after trans- mitting  
eight bits. During the ninth clock cycle the  
missions. The master must then issue a stop condition to  
return the device to the standby power mode and  
place the device into a known state.  
receiver will pull the SDA line LOW to acknowledge that  
it received the eight bits of data. Refer to Figure 3.  
Figure 3. Acknowledge Response From Receiver  
SCL FROM  
MASTER  
1
8
9
DATA OUTPUT  
FROM  
TRANSMITTER  
DATA  
OUTPUT  
FROM  
RECEIVER  
START  
ACKNOWLEDGE  
7035 FM 05  
4