Integrated
Circuit
Systems, Inc.
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in
Figure 3.
V
CC
ICS843021
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
Q1
V
OUT
RL
50
V
CC
- 2V
F
IGURE
3. LVPECL D
RIVER
C
IRCUIT AND
T
ERMINATION
T
o calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V - 2V.
CC
•
For logic high, V
OUT
= V
(V
CCO_MAX
OH_MAX
=
V
CC_MAX
– 0.9V
-V
OH_MAX
) =
0.9V
=
V
– 1.7V
•
For logic low, V
OUT
= V
(V
CCO_MAX
OL_MAX
CC_MAX
-V
OL_MAX
) =
1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R ] * (V
L
CC_MAX
-V
OH_MAX
) = [(2V - (V
CC_MAX
-V
OH_MAX
))/R ] * (V
L
CC_MAX
-V
OH_MAX
)=
[(2V - 0.9V)/50Ω] * 0.9V =
19.8mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R ] * (V
L
CC_MAX
-V
OL_MAX
) = [(2V - (V
CC_MAX
-V
OL_MAX
))/R ] * (V
L
CC_MAX
-V
OL_MAX
)=
[(2V - 1.7V)/50Ω] * 1.7V =
10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L =
30mW
843021AG
www.icst.com/products/hiperclocks.html
9
REV. C MARCH 31, 2005
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
