欢迎访问ic37.com |
会员登录 免费注册
发布采购

V385AGLF 参数 Datasheet PDF下载

V385AGLF图片预览
型号: V385AGLF
PDF下载: 下载PDF文件 查看货源
内容描述: 8位LVDS发送器视频 [8-BIT LVDS TRANSMITTER FOR VIDEO]
分类和应用: 驱动器接口集成电路光电二极管
文件页数/大小: 9 页 / 159 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
 浏览型号V385AGLF的Datasheet PDF文件第2页浏览型号V385AGLF的Datasheet PDF文件第3页浏览型号V385AGLF的Datasheet PDF文件第4页浏览型号V385AGLF的Datasheet PDF文件第5页浏览型号V385AGLF的Datasheet PDF文件第6页浏览型号V385AGLF的Datasheet PDF文件第7页浏览型号V385AGLF的Datasheet PDF文件第8页浏览型号V385AGLF的Datasheet PDF文件第9页  
V385
8-B
IT
LVDS T
RANSMITTER FOR
V
IDEO
General Description
The V385 transmitter converts 28 bits of 3.3 V
CMOS/TTL into 4 Low Voltage Differential Signaling
(LVDS) data streams while the transmit clock input is
transmitted in parallel with the data streams over a fifth
LVDS link. The V385 can be programmed for rising
edge or falling edge clocks through pin R_FB.
ICS manufactures a large variety of video application
devices. Consult ICS for all of your video application
requirements.
Features
Pin and function compatible with the National
DS90C385, TI SN65LVDS93 and THine
THC63LVDM83
Convert 28 bits of 3.3 V CMOS/TTL into 4 LVDS
streams
Up to 2.38 Gbps throughput or 297.5 Megabytes/sec
bandwidth
Pin Assignment
VCC
TxIN5
TxIN6
TxIN7
GND
TxIN8
TxIN9
TxIN10
VCC
TxIN11
TxIN12
TxIN13
GND
TxIN14
TxIN15
TxIN16
R_FB
TxIN17
TxIN18
TxIN19
GND
TxIN20
TxIN21
TxIN22
TxIN23
VCC
TxIN24
TxIN25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
TxIN4
TxIN3
TxIN2
GND
TxIN1
TxIN0
TxIN27
LVDS_GND
TxOUT0-
TxOUT0+
TxOUT1-
TxOUT1+
LVDS_VCC
LVDS_GND
TxOUT2-
TxOUT2+
TxCLKOUT-
TxCLKOUT+
TxOUT3-
TxOUT3+
LVDS_GND
PLL_GND
PLL_VCC
PLL_GND
PWRDWN
TxCLKIN
TxIN26
GND
Wide clock frequency range from 20 MHz to 85 MHz
Spread spectrum compatible
Supports VGA, SVGA, XGA, and SXGA
LVDS voltage swing of 350 mV for low EMI
On-chip PLL requires no external components
Single 3.3 V low-power CMOS design
Programmable rising or falling edge strobe
Power-down control function
Compatible with TIA/EIA-644 LVDS standards
Packaged in a 56-pin TSSOP (Pb free available)
Block Diagram
Red, Green, Blue
HSYNC
VSYNC
DATA ENABLE
CONTROL
TxOUT2-
R_FB
PWRDWN
CLOCK
PLL
TxCLKOUT-
TxOUT3+
TxOUT3-
TxCLKOUT+
TTL to
LVDS
TxOUT1-
TxOUT2+
24
TxOUT0+
TxOUT0-
TxOUT1+
56-pin TSSOP
V385 Datasheet
1
3/30/05
Revision 1.6
I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m