9DB233
Two Output Differential Buffer for PCIe Gen3
Datasheet
Alternative Termination for LVDS and other Common Differential Signals (figure 3)
Vdiff
Vp-p
Vcm
R1
R2
R3
R4
Note
0.45v
0.22v
1.08
33
150
100
100
0.58
0.28
0.6
33
78.7
137
100
0.80
0.40
0.6
33
78.7
none
100
ICS874003i-02 input compatible
0.60
0.3
1.2
33
174
140
100
Standard LVDS
R1a = R1b = R1
R2a = R2b = R2
Figure 3
L1
R1a
L2
R3
L4
L4'
R4
L1'
R1b
HCSL Output Buffer
L2'
R2a
R2b
Down Device
REF_CLK Input
L3'
L3
Cable Connected AC Coupled Application (figure 4)
Component
Value
Note
R5a, R5b
8.2K 5%
R6a, R6b
1K 5%
Cc
0.1 µF
Vcm
0.350 volts
Figure 4
3.3 Volts
R5a
Cc
L4
L4'
Cc
R6a
R5b
R6b
PCIe Device
REF_CLK Input
IDT
®
Two Output Differential Buffer for PCIe Gen3
1667C—04/20/11
8
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
