DATASHEET
LOW PHASE NOISE T1/E1 CLOCK GENERATOR
Description
The MK1581-01 provides synchronization and timing
control for T1 and E1 based network access or multitrunk
telecommunication systems. The device accepts an 8 kHz
frame clock input and uses an on-chip VCXO to produce a
synchronized low phase noise clock output.
This monolithic IC, combined with an external inexpensive
quartz crystal, can be used to replace a more costly hybrid
VCXO retiming module. Through selection of external loop
filter components values, the device can be tailored to meet
the system’s clock jitter attenuation requirements. Low-pass
jitter attenuation characteristics in the Hz range are
possible.
MK1581-01
Features
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Generates a T1 (1.544 MHz) or E1 (2.048 MHz) output
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clock from an 8kHz frame clock input
Configurable jitter attenuation characteristics, excellent
for use as a Stratum source de-jitter circuit
VCXO-based clock generation ensures very low jitter and
phase noise generation
Output clock is phase and frequency locked to the input
reference clock
+115ppm minimum crystal frequency pullability range,
using recommended crystal
Industrial temperature range
Low power CMOS technology
16 pin TSSOP package
Single 3.3 V power supply
Block Diagram
R
SET
Pullable Crystal
X1
X2
VDD
VDD
3
ISET
Phase
Detector
8kHz_IN
Charge
Pump
VCXO
Output
Divider
CLK
Feedback
Divider
SEL
CHGP
R
S
C
S
VIN
GND
5
C
P
IDT™ / ICS™
LOW PHASE NOISE T1/E1 CLOCK GENERATOR
1
MK1581-01
REV D 073007
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
