TLE 4263
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
C
D
which can be calculated as follows:
Definitions:
C
D
= delay capacitor
t
rd
= reset delay time
I
D,ch
= charge current, typical 60 A
V
=
V
DU
, typical 1.70 V
V
DU
= upper delay switching threshold at
C
D
for reset delay time
V
I
<
t
rr
V
Q
V
Q, rt
V
D
V
DU
V
DRL
d
V I
D, ch
=
d
t
C
D
t
rd
V
RO
t
rr
Power-ON
Reset
Over-
temperature
Voltage Drop
at Input
Under-
voltage
Figure 5
Time Response, Watchdog with High-Frequency Clock
Reset Switching Threshold
The present default value is typ. 4.65 V. When using the TLE 4263 the reset threshold
can be set to 3.5 V <
V
Q,rt
< 4.6 V by connecting an external voltage divider to pin RADJ.
The calculation can be easily done since the reset adjust input current can be neglected.
If this feature is not needed, the pin has to be connected to GND.
Data Sheet Rev. 2.4
⌠
V
Q, rt
=
(1+R1/R2)
V
RADJ,th
10
←
α
⌠
C
D
= (
t
rd
I
D,ch
)/
V
α
t
t
t
t
Secondary Load
Bounce
Spike
AET03066
2001-01-17
INFINEON [ INFINEON TECHNOLOGIES AG ]
