IA82050
Data Sheet
ASYNCHRONOUS SERIAL CONTROLLER
As of Production Ver. 01
DC Characteristics
Symbol
VIL
Parameter
Input Low Voltage
Notes
(1)
Min
-0.5
2.1
Max
0.7
Unit
V
V
VIH1
VIH2
VOL
VOH
ILI
Input High Voltage-Cerdip
Input High Voltage-LCC
Output Low Voltage
(1)
VDD+.07
VDD+.07
0.4
(2)
2.1
V
(2), (8)
(3), (8)
(4)
V
Output High Voltage
Input Leakage Current
3-State Leakage Current
Power Supply Current
Strapping Pullup Resistor
Standby Supply Current
RTSn, DTRn Strapping Current
RTSn, DTRn Strapping Current
Input Capacitance
2.4
V
±1
µA
µA
mA/MHz
A
ILO
(5)
±1
1.12
-137
100
ICC
(6)
IPU
(12)
(9)
-283
ISTBY
IOHR
IOLR
CIN
µA
mA
mA
pF
(10)
(11)
(7)
1.92
N/A
5
6
6
CIO
I/O Capacitance
(7)
pF
CXTAL
X1, X2 Load
pF
NOTES:
1. Does not apply to CLK/X1 pin, when configured as crystal oscillator input (X1).
2. @ IOL = 1.92 mA
3. @ IOH = 1.92 mA
4. 0< VIN < VCC
.
5. 0.4V < VOUT < VCC - 0.4V
6. VDD = 5.5V, VIL= 0.7V (max), VIH = VDD - 0.7V (min), Typ. Val = 1.12 mA/MHz (Not Tested), Ext. 1X CLK, IOL = IOH = 0.
7. Freq. = 1MHz.
8. Does not apply to OUT2/X2 pin, when configured as crystal oscillator output (X2).
Static IDD current is exclusive of input/output drive requirements and is
measured with the clocks stopped and all inputs tied to VDD or VSS, configured
to draw minimum current.
9. Freq. = 1MHz. But, input clock not running.
10. Applies only during hardware reset for clock configuration options. Strapping current for logic HIGH.
11. Applies only during hardware reset for clock configuration options. Strapping current for logic LOW
12. Inputs (RTSn, DTRn, TB) with Pullups tested @ Vin = 0.0V VDD = 5.5V
Copyright 2001
innovASIC
ENG211010326-00
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