3 Volt Intel® Advanced+ Boot Block Flash Memory Stacked-CSP Family
4.0
Power and Reset Considerations
4.1
Power-Up/Down Characteristics
In order to prevent any condition that may result in a spurious write or erase operation, it is
recommended to power-up F-VCC, F-VCCQ and S-VCC together. Conversely, F-VCC, F-VCCQ and
S-VCC must power-down together. It is also recommended to power-up F-VPP with or slightly after
F-VCC. Conversely, F-VPP must power down with or slightly before F-VCC.
If F-VCCQ and/or F-VPP are not connected to the F-VCC supply, then F-VCC should attain F-
VCCMin before applying F-VCCQ and F-VPP. Device inputs should not be driven before supply
voltage = F-VCCMin. Power supply transitions should only occur when F-RP# is low.
4.2
Additional Flash Features
Intel 3 Volt Advanced+ Stacked-CSP products provide in-system programming and erase in the
1.65 V–3.3 V range. For fast production programming, it also includes a low-cost, backward-
compatible 12 V programming feature.
4.2.1
Improved 12 Volt Production Programming
When F-VPP is between 1.65 V and 3.3 V, all program and erase current is drawn through the
F-VCC signal. Note that if F-VPP is driven by a logic signal, VIH min = 1.65 V. That is, F-VPP must
remain above 1.65 V to perform in-system flash modifications. When F-VPP is connected to a 12 V
power supply, the device draws program and erase current directly from the F-VPP signal. This
eliminates the need for an external switching transistor to control the voltage F-VPP. Figure 12,
“Example Power Supply Configurations” on page 42 shows examples of how the flash power
supplies can be configured for various usage models.
The 12 V F-VPP mode enhances programming performance during the short period of time
typically found in manufacturing processes; however, it is not intended for extended use. 12 V may
be applied to F-VPP during program and erase operations for a maximum of 1000 cycles on the
main blocks and 2500 cycles on the parameter blocks. F-VPP may be connected to 12 V for a total
of 80 hours maximum. Stressing the device beyond these limits may cause permanent damage.
4.2.2
F-VPP ≤ VPPLK for Complete Protection
In addition to the flexible block locking, the F-VPP programming voltage can be held low for
absolute hardware write protection of all blocks in the flash device. When F-VPP is below VPPLK
,
any program or erase operation will result in a error, prompting the corresponding status register bit
(SR.3) to be set.
Datasheet
23
INTEL [ INTEL ]
