PRELIMINARY
8XC196NU COMMERCIAL
CHMOS 16-BIT MICROCONTROLLER
s
50 MHz Operation
†
s
1 Mbyte of Linear Address Space
s
Optional 48 Kbytes of ROM
s
1 Kbyte of Register RAM
s
Register-register Architecture
s
Footprint and Functionally Compatible
Upgrade for the 8XC196NP
s
32 I/O Port Pins
s
16 Prioritized Interrupt Sources
s
4 External Interrupt Pins and NMI Pin
s
2 Flexible 16-bit Timer/Counters with
Quadrature Counting Capability
s
3 Pulse-width Modulator (PWM)
Outputs with High Drive Capability
s
Full-duplex Serial Port with Dedicated
Baud-rate Generator
s
Peripheral Transaction Server
†
s
Chip-select Unit
— 6 Chip-select Pins
— Dynamic Demultiplexed/Multiplexed
Address/Data Bus for Each
Chip Select
— Programmable Wait States
(0–3) for Each Chip Select
— Programmable Bus Width
(8- or 16-bit) for Each Chip Select
— Programmable Address Range for
Each Chip Select
s
Event Processor Array (EPA) with
4 High-speed Capture/Compare
Channels
s
Multiply and Accumulate Executes in
640 ns Using the 32-bit Hardware
Accumulator
s
960 ns 32/16 Unsigned Division
s
100-pin SQFP or 100-pin QFP Package
s
Complete System Development
Support
s
High-speed CHMOS Technology
40 MHz standard; 50 MHz is Speed Premium
The 8XC196NU is a member of Intel’s 16-bit MCS
®
96 microcontroller family. The device features 1 Mbyte of
linear address space, a demultiplexed bus, and a chip-select unit. The external bus can dynamically switch
between multiplexed and demultiplexed operation.
COPYRIGHT © INTEL CORPORATION, 1997
February 1997
Order Number:
272644-004
INTEL [ INTEL CORPORATION ]
